Inverted_Pendulum-in-TAHU - Files

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wirepad.lbr
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zetex.lbr
zilog.lbr
xilinx-xc18v.lbr<?xml version="1.0" encoding="utf-8"?>
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<symbols>
<symbol name="XC18V01_PC20">
<wire x1="-10.16" y1="-20.32" x2="12.7" y2="-20.32" width="0.254" layer="94"/>
<wire x1="12.7" y1="-20.32" x2="12.7" y2="17.78" width="0.254" layer="94"/>
<wire x1="12.7" y1="17.78" x2="-10.16" y2="17.78" width="0.254" layer="94"/>
<wire x1="-10.16" y1="17.78" x2="-10.16" y2="-20.32" width="0.254" layer="94"/>
<text x="-10.16" y="19.05" size="1.778" layer="95">&gt;NAME</text>
<text x="-10.16" y="-22.86" size="1.778" layer="96">&gt;VALUE</text>
<pin name="TDI" x="-12.7" y="-7.62" length="short" direction="in"/>
<pin name="TMS" x="-12.7" y="-10.16" length="short" direction="in"/>
<pin name="TCK" x="-12.7" y="-12.7" length="short" direction="in"/>
<pin name="D4_CF" x="15.24" y="-5.08" length="short" rot="R180"/>
<pin name="RESET_OE" x="-12.7" y="7.62" length="short"/>
<pin name="D6" x="15.24" y="-10.16" length="short" rot="R180"/>
<pin name="CE" x="-12.7" y="0" length="short" direction="in"/>
<pin name="GND" x="-12.7" y="-17.78" length="short" direction="pwr"/>
<pin name="D7" x="15.24" y="-12.7" length="short" rot="R180"/>
<pin name="CEO" x="15.24" y="10.16" length="short" direction="out" rot="R180"/>
<pin name="D5" x="15.24" y="-7.62" length="short" rot="R180"/>
<pin name="D3" x="15.24" y="-2.54" length="short" rot="R180"/>
<pin name="D1" x="15.24" y="2.54" length="short" rot="R180"/>
<pin name="TDO" x="-12.7" y="-5.08" length="short" direction="out"/>
<pin name="VPP" x="-12.7" y="12.7" length="short" direction="pas"/>
<pin name="VCCO" x="15.24" y="15.24" length="short" direction="pwr" rot="R180"/>
<pin name="VCC" x="-12.7" y="15.24" length="short" direction="pwr"/>
<pin name="D0" x="15.24" y="5.08" length="short" rot="R180"/>
<pin name="D2" x="15.24" y="0" length="short" rot="R180"/>
<pin name="CLK" x="-12.7" y="2.54" length="short" direction="in"/>
</symbol>
<symbol name="XC18V01_VQ44">
<wire x1="-12.7" y1="-25.4" x2="12.7" y2="-25.4" width="0.4064" layer="94"/>
<wire x1="12.7" y1="-25.4" x2="12.7" y2="25.4" width="0.4064" layer="94"/>
<wire x1="12.7" y1="25.4" x2="-12.7" y2="25.4" width="0.4064" layer="94"/>
<wire x1="-12.7" y1="25.4" x2="-12.7" y2="-25.4" width="0.4064" layer="94"/>
<text x="-12.7" y="26.67" size="1.778" layer="95">&gt;NAME</text>
<text x="-12.7" y="-27.94" size="1.778" layer="96">&gt;VALUE</text>
<pin name="TDI" x="-15.24" y="-2.54" length="short" direction="in"/>
<pin name="TMS" x="-15.24" y="-7.62" length="short" direction="in"/>
<pin name="GND@2" x="-15.24" y="-17.78" length="short" direction="pwr"/>
<pin name="TCK" x="-15.24" y="-10.16" length="short" direction="in"/>
<pin name="VCCO@1" x="15.24" y="22.86" length="short" direction="pwr" rot="R180"/>
<pin name="D4_CF" x="15.24" y="-7.62" length="short" direction="out" rot="R180"/>
<pin name="CF" x="-15.24" y="2.54" length="short" direction="out"/>
<pin name="RESET_OE" x="-15.24" y="10.16" length="short"/>
<pin name="D6" x="15.24" y="-12.7" length="short" direction="out" rot="R180"/>
<pin name="CE" x="-15.24" y="5.08" length="short" direction="in"/>
<pin name="VCCO@2" x="15.24" y="20.32" length="short" direction="pwr" rot="R180"/>
<pin name="VCC@1" x="-15.24" y="22.86" length="short" direction="pwr"/>
<pin name="GND@3" x="-15.24" y="-20.32" length="short" direction="pwr"/>
<pin name="D7" x="15.24" y="-15.24" length="short" direction="out" rot="R180"/>
<pin name="CEO" x="15.24" y="7.62" length="short" direction="out" rot="R180"/>
<pin name="D5" x="15.24" y="-10.16" length="short" direction="out" rot="R180"/>
<pin name="VCCO@3" x="15.24" y="17.78" length="short" direction="pwr" rot="R180"/>
<pin name="D3" x="15.24" y="-5.08" length="short" direction="out" rot="R180"/>
<pin name="GND@4" x="-15.24" y="-22.86" length="short" direction="pwr"/>
<pin name="D1" x="15.24" y="0" length="short" direction="out" rot="R180"/>
<pin name="TDO" x="-15.24" y="-5.08" length="short" direction="out"/>
<pin name="VPP" x="-15.24" y="15.24" length="short" direction="pas"/>
<pin name="VCCO@4" x="15.24" y="15.24" length="short" direction="pwr" rot="R180"/>
<pin name="VCC@2" x="-15.24" y="20.32" length="short" direction="pwr"/>
<pin name="D0" x="15.24" y="2.54" length="short" direction="out" rot="R180"/>
<pin name="GND@1" x="-15.24" y="-15.24" length="short" direction="pwr"/>
<pin name="D2" x="15.24" y="-2.54" length="short" direction="out" rot="R180"/>
<pin name="CLK" x="-15.24" y="7.62" length="short" direction="in"/>
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<symbol name="XC18V01_SO20">
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<wire x1="12.7" y1="-15.24" x2="12.7" y2="12.7" width="0.254" layer="94"/>
<wire x1="12.7" y1="12.7" x2="-10.16" y2="12.7" width="0.254" layer="94"/>
<wire x1="-10.16" y1="12.7" x2="-10.16" y2="-15.24" width="0.254" layer="94"/>
<text x="-10.16" y="13.97" size="1.778" layer="95">&gt;NAME</text>
<text x="-10.16" y="-17.78" size="1.778" layer="96">&gt;VALUE</text>
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<pin name="TMS" x="-15.24" y="0" length="middle" direction="in"/>
<pin name="TCK" x="-15.24" y="-2.54" length="middle" direction="in"/>
<pin name="D4_CF" x="-15.24" y="-5.08" length="middle" direction="out"/>
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<pin name="CE" x="-15.24" y="-12.7" length="middle" direction="in"/>
<pin name="GND_3" x="17.78" y="-12.7" length="middle" direction="pas" rot="R180"/>
<pin name="D7" x="17.78" y="-10.16" length="middle" direction="out" rot="R180"/>
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<pin name="VPP" x="17.78" y="5.08" length="middle" direction="pas" rot="R180"/>
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<pin name="CLK" x="-15.24" y="5.08" length="middle" direction="in"/>
</symbol>
</symbols>
<devicesets>
<deviceset name="XC18*_PC20" prefix="IC">
<description>&lt;b&gt;xc18v01_pc20&lt;/b&gt; &lt;font color="red"&gt;edit this description&lt;/font&gt;&lt;p&gt;
Auto generated by &lt;i&gt;make-symbol-device-package-bsdl.ulp Rev. 26&lt;/i&gt;&lt;br&gt;
Source: xc18v01_pc20.bsd</description>
<gates>
<gate name="G$1" symbol="XC18V01_PC20" x="0" y="0"/>
</gates>
<devices>
<device name="P" package="PLCC20">
<connects>
<connect gate="G$1" pin="CE" pad="10"/>
<connect gate="G$1" pin="CEO" pad="13"/>
<connect gate="G$1" pin="CLK" pad="3"/>
<connect gate="G$1" pin="D0" pad="1"/>
<connect gate="G$1" pin="D1" pad="16"/>
<connect gate="G$1" pin="D2" pad="2"/>
<connect gate="G$1" pin="D3" pad="15"/>
<connect gate="G$1" pin="D4_CF" pad="7"/>
<connect gate="G$1" pin="D5" pad="14"/>
<connect gate="G$1" pin="D6" pad="9"/>
<connect gate="G$1" pin="D7" pad="12"/>
<connect gate="G$1" pin="GND" pad="11"/>
<connect gate="G$1" pin="RESET_OE" pad="8"/>
<connect gate="G$1" pin="TCK" pad="6"/>
<connect gate="G$1" pin="TDI" pad="4"/>
<connect gate="G$1" pin="TDO" pad="17"/>
<connect gate="G$1" pin="TMS" pad="5"/>
<connect gate="G$1" pin="VCC" pad="20"/>
<connect gate="G$1" pin="VCCO" pad="19"/>
<connect gate="G$1" pin="VPP" pad="18"/>
</connects>
<technologies>
<technology name="V01">
<attribute name="MF" value="" constant="no"/>
<attribute name="MPN" value="" constant="no"/>
<attribute name="OC_FARNELL" value="unknown" constant="no"/>
<attribute name="OC_NEWARK" value="unknown" constant="no"/>
</technology>
<technology name="V256">
<attribute name="MF" value="" constant="no"/>
<attribute name="MPN" value="" constant="no"/>
<attribute name="OC_FARNELL" value="unknown" constant="no"/>
<attribute name="OC_NEWARK" value="unknown" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="XC18V01_VQ44" prefix="IC">
<description>&lt;b&gt;xc18v01_vq44&lt;/b&gt; &lt;font color="red"&gt;edit this description&lt;/font&gt;&lt;p&gt;
Auto generated by &lt;i&gt;make-symbol-device-package-bsdl.ulp Rev. 26&lt;/i&gt;&lt;br&gt;
Source: xc18v01_vq44.bsd</description>
<gates>
<gate name="G$1" symbol="XC18V01_VQ44" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SQFP-S-10X10-44">
<connects>
<connect gate="G$1" pin="CE" pad="15"/>
<connect gate="G$1" pin="CEO" pad="21"/>
<connect gate="G$1" pin="CF" pad="10"/>
<connect gate="G$1" pin="CLK" pad="43"/>
<connect gate="G$1" pin="D0" pad="40"/>
<connect gate="G$1" pin="D1" pad="29"/>
<connect gate="G$1" pin="D2" pad="42"/>
<connect gate="G$1" pin="D3" pad="27"/>
<connect gate="G$1" pin="D4_CF" pad="9"/>
<connect gate="G$1" pin="D5" pad="25"/>
<connect gate="G$1" pin="D6" pad="14"/>
<connect gate="G$1" pin="D7" pad="19"/>
<connect gate="G$1" pin="GND@1" pad="41"/>
<connect gate="G$1" pin="GND@2" pad="6"/>
<connect gate="G$1" pin="GND@3" pad="18"/>
<connect gate="G$1" pin="GND@4" pad="28"/>
<connect gate="G$1" pin="RESET_OE" pad="13"/>
<connect gate="G$1" pin="TCK" pad="7"/>
<connect gate="G$1" pin="TDI" pad="3"/>
<connect gate="G$1" pin="TDO" pad="31"/>
<connect gate="G$1" pin="TMS" pad="5"/>
<connect gate="G$1" pin="VCC@1" pad="17"/>
<connect gate="G$1" pin="VCC@2" pad="38"/>
<connect gate="G$1" pin="VCCO@1" pad="8"/>
<connect gate="G$1" pin="VCCO@2" pad="16"/>
<connect gate="G$1" pin="VCCO@3" pad="26"/>
<connect gate="G$1" pin="VCCO@4" pad="36"/>
<connect gate="G$1" pin="VPP" pad="35"/>
</connects>
<technologies>
<technology name="">
<attribute name="MF" value="" constant="no"/>
<attribute name="MPN" value="" constant="no"/>
<attribute name="OC_FARNELL" value="unknown" constant="no"/>
<attribute name="OC_NEWARK" value="unknown" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="XC18V01_SO20" prefix="IC">
<description>&lt;b&gt;xc18v01_so20&lt;/b&gt; &lt;font color="red"&gt;edit this description&lt;/font&gt;&lt;p&gt;
Auto generated by &lt;i&gt;make-symbol-device-package-bsdl.ulp Rev. 26&lt;/i&gt;&lt;br&gt;
Source: xc18v01_so20.bsd</description>
<gates>
<gate name="G$1" symbol="XC18V01_SO20" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP20">
<connects>
<connect gate="G$1" pin="CE" pad="10"/>
<connect gate="G$1" pin="CEO" pad="13"/>
<connect gate="G$1" pin="CLK" pad="3"/>
<connect gate="G$1" pin="D0" pad="1"/>
<connect gate="G$1" pin="D1" pad="16"/>
<connect gate="G$1" pin="D2" pad="2"/>
<connect gate="G$1" pin="D3" pad="15"/>
<connect gate="G$1" pin="D4_CF" pad="7"/>
<connect gate="G$1" pin="D5" pad="14"/>
<connect gate="G$1" pin="D6" pad="9"/>
<connect gate="G$1" pin="D7" pad="12"/>
<connect gate="G$1" pin="GND_3" pad="11"/>
<connect gate="G$1" pin="RESET_OE" pad="8"/>
<connect gate="G$1" pin="TCK" pad="6"/>
<connect gate="G$1" pin="TDI" pad="4"/>
<connect gate="G$1" pin="TDO" pad="17"/>
<connect gate="G$1" pin="TMS" pad="5"/>
<connect gate="G$1" pin="VCCO_4" pad="19"/>
<connect gate="G$1" pin="VCC_2" pad="20"/>
<connect gate="G$1" pin="VPP" pad="18"/>
</connects>
<technologies>
<technology name="">
<attribute name="MF" value="" constant="no"/>
<attribute name="MPN" value="" constant="no"/>
<attribute name="OC_FARNELL" value="unknown" constant="no"/>
<attribute name="OC_NEWARK" value="unknown" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>
Takaharu Nakajima / Inverted_Pendulum-in-TAHU - Files

Files

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circuit / eagle / projects / Inverted_Pendulum-in-TAHU / untitled.brd

circuit / eagle / projects / Inverted_Pendulum-in-TAHU / untitled.sch

circuit / eagle / projects / Inverted_Pendulum-in-TAHU / untitled2.brd

circuit / eagle / projects / Inverted_Pendulum-in-TAHU / untitled2.sch

circuit / eagle / projects / Inverted_Pendulum-in-TAHU / untitled3.brd

circuit / eagle / projects / Inverted_Pendulum-in-TAHU / untitled3.sch

circuit / eagle / projects / Inverted_Pendulum-in-TAHU / untitled4.brd

circuit / eagle / projects / Inverted_Pendulum-in-TAHU / untitled4.sch

circuit / eagle / projects / Inverted_Pendulum-in-TAHU / untitled5.brd

circuit / eagle / projects / Inverted_Pendulum-in-TAHU / untitled5.sch

circuit / eagle / projects / Inverted_Pendulum-in-TAHU / untitled6.brd

circuit / eagle / projects / Inverted_Pendulum-in-TAHU / untitled6.sch
