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circuit / eagle / projects / Inverted_Pendulum-in-TAHU / untitled6.sch
Last update 7 years 3 months
by
Takaharu Nakajima
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direction="pwr" rot="R180"/> <pin name="VDD" x="20.32" y="0" length="short" direction="pwr" rot="R180"/> <pin name="INRTS" x="20.32" y="2.54" length="short" direction="in" rot="R180"/> <pin name="ITXD" x="20.32" y="5.08" length="short" direction="in" rot="R180"/> <pin name="TEST11" x="20.32" y="7.62" length="short" direction="nc" rot="R180"/> <pin name="ORXD" x="7.62" y="20.32" length="short" direction="out" rot="R270"/> <pin name="OCD" x="5.08" y="20.32" length="short" direction="out" rot="R270"/> <pin name="TEST12" x="2.54" y="20.32" length="short" direction="nc" rot="R270"/> <pin name="TEST1" x="0" y="20.32" length="short" direction="in" rot="R270"/> <pin name="TEST2" x="-2.54" y="20.32" length="short" direction="nc" rot="R270"/> <pin name="VDD@1" x="-5.08" y="20.32" length="short" direction="pwr" rot="R270"/> <pin name="TEST3" x="-7.62" y="20.32" length="short" direction="nc" rot="R270"/> <pin name="TEST4" x="-10.16" y="20.32" length="short" direction="nc" rot="R270"/> </symbol> <symbol name="NCP2820"> <wire x1="-12.7" y1="7.62" x2="12.7" y2="7.62" width="0.254" layer="94"/> <wire x1="12.7" y1="7.62" x2="12.7" y2="-10.16" width="0.254" layer="94"/> <wire x1="12.7" y1="-10.16" x2="-12.7" y2="-10.16" width="0.254" layer="94"/> <wire x1="-12.7" y1="-10.16" x2="-12.7" y2="7.62" width="0.254" layer="94"/> <text x="-12.7" y="8.89" size="1.778" layer="95">>NAME</text> <text x="2.54" y="-12.7" size="1.778" layer="96">>VALUE</text> <pin name="INP" x="-15.24" y="-2.54" length="short" direction="in"/> <pin name="INM" x="-15.24" y="2.54" length="short" direction="in"/> <pin name="!SD" x="-7.62" y="-12.7" length="short" direction="in" rot="R90"/> <pin name="GND@1" x="-2.54" y="-12.7" length="short" direction="pwr" rot="R90"/> <pin name="GND@2" x="0" y="-12.7" length="short" direction="pwr" rot="R90"/> <pin name="OUTM" x="15.24" y="-5.08" length="short" direction="out" rot="R180"/> <pin name="OUTP" x="15.24" y="2.54" length="short" direction="out" rot="R180"/> <pin name="VP@1" x="-2.54" y="10.16" length="short" direction="pwr" rot="R270"/> <pin name="VP@2" x="0" y="10.16" length="short" direction="pwr" rot="R270"/> </symbol> <symbol name="SA571"> <pin name="RECT_CAP1" x="-15.24" y="17.78" length="short" direction="pas"/> <pin name="RECT_IN1" x="-15.24" y="12.7" length="short" direction="in"/> <pin name="G_CELL_IN1" x="-15.24" y="7.62" length="short" direction="in"/> <pin name="INV_IN1" x="-15.24" y="2.54" length="short" direction="in"/> <pin name="RES_R3_1" x="-15.24" y="-2.54" length="short" direction="in"/> <pin name="OUT1" x="-15.24" y="-7.62" length="short" direction="out"/> <pin name="THD_TRIM1" x="-15.24" y="-12.7" length="short" direction="in"/> <pin name="THD_TRIM2" x="20.32" y="-12.7" length="short" direction="in" rot="R180"/> <pin name="OUT2" x="20.32" y="-7.62" length="short" direction="out" rot="R180"/> <pin name="RES_R3_2" x="20.32" y="-2.54" length="short" direction="in" rot="R180"/> <pin name="INV_IN2" x="20.32" y="2.54" length="short" direction="in" rot="R180"/> <pin name="G_CELL_IN2" x="20.32" y="7.62" length="short" direction="in" rot="R180"/> <pin name="RECT_IN2" x="20.32" y="12.7" length="short" direction="in" rot="R180"/> <pin name="RECT_CAP2" x="20.32" y="17.78" length="short" direction="pas" rot="R180"/> <pin name="GND" x="-15.24" y="-17.78" length="short" direction="pwr"/> <pin name="VCC" x="-15.24" y="22.86" length="short" direction="pwr"/> <wire x1="-12.7" y1="25.4" x2="17.78" y2="25.4" width="0.4064" layer="94"/> <wire x1="17.78" y1="25.4" x2="17.78" y2="-20.32" width="0.4064" layer="94"/> <wire x1="17.78" y1="-20.32" x2="-12.7" y2="-20.32" width="0.4064" layer="94"/> <wire x1="-12.7" y1="-20.32" x2="-12.7" y2="25.4" width="0.4064" layer="94"/> <text x="-12.7" y="26.67" size="1.778" layer="95">>NAME</text> <text x="-12.7" y="-22.86" size="1.778" layer="96">>VALUE</text> </symbol> <symbol name="SA571-G"> <pin name="RECT_CAP" x="0" y="-12.7" length="short" direction="pas" rot="R90"/> <pin name="RECT_IN" x="-20.32" y="-2.54" length="short" direction="in"/> <pin name="G_CELL_IN" x="-20.32" y="7.62" length="short" direction="in"/> <pin name="INV_IN" x="-20.32" y="-7.62" length="short" direction="in"/> <pin name="RES_R3" x="-20.32" y="2.54" length="short" direction="in"/> <pin name="OUT" x="20.32" y="0" length="short" direction="out" rot="R180"/> <pin name="THD_TRIM" x="5.08" y="-12.7" length="short" direction="in" rot="R90"/> <wire x1="-17.78" y1="10.16" x2="17.78" y2="10.16" width="0.4064" layer="94"/> <wire x1="17.78" y1="10.16" x2="17.78" y2="-10.16" width="0.4064" layer="94"/> <wire x1="17.78" y1="-10.16" x2="-17.78" y2="-10.16" width="0.4064" layer="94"/> <wire x1="-17.78" y1="-10.16" x2="-17.78" y2="10.16" width="0.4064" layer="94"/> <text x="-17.78" y="11.43" size="1.778" layer="95">>NAME</text> <text x="-17.78" y="-12.7" size="1.778" layer="96">>VALUE</text> </symbol> <symbol name="PWR2"> <pin name="VCC" x="0" y="12.7" length="short" direction="pwr" rot="R270"/> <pin name="GND" x="0" y="-12.7" length="short" direction="pwr" rot="R90"/> <text x="-2.54" y="1.27" size="1.778" layer="95">>NAME</text> <text x="-2.54" y="-1.27" size="1.778" layer="96">>VALUE</text> </symbol> </symbols> <devicesets> <deviceset name="*161" prefix="IC"> <description><b>Universal Voltage Monitor</b><p> Source: www.onsemi.com/pub_link/Collateral/MC34161-D.PDF</description> <gates> <gate name="G$1" symbol="MC34161" x="0" y="0"/> </gates> <devices> <device name="P" package="DIL8"> <connects> <connect gate="G$1" pin="GND" pad="4"/> <connect gate="G$1" pin="IN1" pad="2"/> <connect gate="G$1" pin="IN2" pad="3"/> <connect gate="G$1" pin="MODE" pad="7"/> <connect gate="G$1" pin="OUT1" pad="6"/> <connect gate="G$1" pin="OUT2" pad="5"/> <connect gate="G$1" pin="VCC" pad="8"/> <connect gate="G$1" pin="VREF" pad="1"/> </connects> <technologies> <technology name="MC33"> <attribute name="MF" value="ON SEMICONDUCTOR" constant="no"/> <attribute name="MPN" value="MC33161P" constant="no"/> <attribute name="OC_FARNELL" value="unknown" constant="no"/> <attribute name="OC_NEWARK" value="07F4769" constant="no"/> </technology> <technology name="MC34"> <attribute name="MF" value="ON SEMICONDUCTOR" constant="no"/> <attribute name="MPN" value="MC34161P" constant="no"/> <attribute name="OC_FARNELL" value="unknown" constant="no"/> <attribute name="OC_NEWARK" value="07F5035" constant="no"/> </technology> </technologies> </device> <device name="D" package="SOIC8"> <connects> <connect gate="G$1" pin="GND" pad="4"/> <connect gate="G$1" pin="IN1" pad="2"/> <connect gate="G$1" pin="IN2" pad="3"/> <connect gate="G$1" pin="MODE" pad="7"/> <connect gate="G$1" pin="OUT1" pad="6"/> <connect gate="G$1" pin="OUT2" pad="5"/> <connect gate="G$1" pin="VCC" pad="8"/> <connect gate="G$1" pin="VREF" pad="1"/> </connects> <technologies> <technology name="MC33"> <attribute name="MF" value="ON SEMICONDUCTOR" constant="no"/> <attribute name="MPN" value="MC33161D" constant="no"/> <attribute name="OC_FARNELL" value="1192059" constant="no"/> <attribute name="OC_NEWARK" value="07F4768" constant="no"/> </technology> <technology name="MC34"> <attribute name="MF" value="ON SEMICONDUCTOR" constant="no"/> <attribute name="MPN" value="MC34161D" constant="no"/> <attribute name="OC_FARNELL" value="1652462" constant="no"/> <attribute name="OC_NEWARK" value="07F5034" constant="no"/> </technology> <technology name="NCV33"> <attribute name="MF" value="" constant="no"/> <attribute name="MPN" value="NCV33161DR2G" constant="no"/> <attribute name="OC_FARNELL" value="unknown" constant="no"/> <attribute name="OC_NEWARK" value="27M2600" constant="no"/> </technology> </technologies> </device> <device name="DM" package="MICRO8"> <connects> <connect gate="G$1" pin="GND" pad="4"/> <connect gate="G$1" pin="IN1" pad="2"/> <connect gate="G$1" pin="IN2" pad="3"/> <connect gate="G$1" pin="MODE" pad="7"/> <connect gate="G$1" pin="OUT1" pad="6"/> <connect gate="G$1" pin="OUT2" pad="5"/> <connect gate="G$1" pin="VCC" pad="8"/> <connect gate="G$1" pin="VREF" pad="1"/> </connects> <technologies> <technology name="MC33"> <attribute name="MF" value="" constant="no"/> <attribute name="MPN" value="MC33161DMR2G" constant="no"/> <attribute name="OC_FARNELL" value="1705447" constant="no"/> <attribute name="OC_NEWARK" value="04R7825" constant="no"/> </technology> <technology name="MC34"> <attribute name="MF" value="ON SEMICONDUCTOR" constant="no"/> <attribute name="MPN" value="MC34161DMR2G" constant="no"/> <attribute name="OC_FARNELL" value="1652462" constant="no"/> <attribute name="OC_NEWARK" value="42K0658" constant="no"/> </technology> </technologies> </device> </devices> </deviceset> <deviceset name="CAT4101" prefix="IC"> <description><b>1A Constant-Current LED Driver with PWM Dimming</b><p> Source: ON Semiconductor .. 4101.pdf</description> <gates> <gate name="G$1" symbol="CAT4101" x="0" y="0"/> </gates> <devices> <device name="" package="TO263_5"> <connects> <connect gate="G$1" pin="EN/PWM" pad="1"/> <connect gate="G$1" pin="GND" pad="3"/> <connect gate="G$1" pin="LED" pad="5"/> <connect gate="G$1" pin="RSET" pad="4"/> <connect gate="G$1" pin="TAB" pad="TAB"/> <connect gate="G$1" pin="VIN" pad="2"/> </connects> <technologies> <technology name=""> <attribute name="MF" value="" constant="no"/> <attribute name="MPN" value="CAT4101TV-T75" constant="no"/> <attribute name="OC_FARNELL" value="1718452" constant="no"/> <attribute name="OC_NEWARK" value="08R5264" constant="no"/> </technology> </technologies> </device> </devices> </deviceset> <deviceset name="MC12052A" prefix="IC"> <description><b>1.1 GHZ Suiper Low Power Dual Modulus Prescaler</b><p> Source:http://motorola.com/sps .. MC12052A.pdf</description> <gates> <gate name="G$1" symbol="MC12052A" x="0" y="0"/> </gates> <devices> <device name="D" package="SO08"> <connects> <connect gate="G$1" pin="!IN" pad="8"/> <connect gate="G$1" pin="GND" pad="5"/> <connect gate="G$1" pin="IN" pad="1"/> <connect gate="G$1" pin="MC" pad="6"/> <connect gate="G$1" pin="OUT" pad="4"/> <connect gate="G$1" pin="SW" pad="3"/> <connect gate="G$1" pin="VCC" pad="2"/> </connects> <technologies> <technology name=""> <attribute name="MF" value="" constant="no"/> <attribute name="MPN" value="" constant="no"/> <attribute name="OC_FARNELL" value="unknown" constant="no"/> <attribute name="OC_NEWARK" value="unknown" constant="no"/> </technology> </technologies> </device> </devices> </deviceset> <deviceset name="MC12080" prefix="IC"> <description><b>1.1 GHz Prescaler</b> MECL PLL COMPONENTS รท10/20/40/80 PRESCALER<p> Source: http://motorola.com/sps .. MC12080.pdf</description> <gates> <gate name="G$1" symbol="MC12080" x="0" y="0"/> </gates> <devices> <device name="D" package="SO08"> <connects> <connect gate="G$1" pin="!IN" pad="8"/> <connect gate="G$1" pin="GND" pad="5"/> <connect gate="G$1" pin="IN" pad="1"/> <connect gate="G$1" pin="OUT" pad="4"/> <connect gate="G$1" pin="SW1" pad="3"/> <connect gate="G$1" pin="SW2" pad="6"/> <connect gate="G$1" pin="SW3" pad="7"/> <connect gate="G$1" pin="VCC" pad="2"/> </connects> <technologies> <technology name=""> <attribute name="MF" value="ON SEMICONDUCTOR" constant="no"/> <attribute name="MPN" value="MC12080D" constant="no"/> <attribute name="OC_FARNELL" value="1607924" constant="no"/> <attribute name="OC_NEWARK" value="40C2542" constant="no"/> </technology> </technologies> </device> <device name="P" package="DIL8"> <connects> <connect gate="G$1" pin="!IN" pad="8"/> <connect gate="G$1" pin="GND" pad="5"/> <connect gate="G$1" pin="IN" pad="1"/> <connect gate="G$1" pin="OUT" pad="4"/> <connect gate="G$1" pin="SW1" pad="3"/> <connect gate="G$1" pin="SW2" pad="6"/> <connect gate="G$1" pin="SW3" pad="7"/> <connect gate="G$1" pin="VCC" pad="2"/> </connects> <technologies> <technology name=""> <attribute name="MF" value="" constant="no"/> <attribute name="MPN" value="" constant="no"/> <attribute name="OC_FARNELL" value="unknown" constant="no"/> <attribute name="OC_NEWARK" value="unknown" constant="no"/> </technology> </technologies> </device> </devices> </deviceset> <deviceset name="MDC3105LT1" prefix="IC"> <description><b>Integrated Relay, Inductive Load Driver</b><p> Sopurce: U6 OnSemi Inductive Load Driver MDC3105-D.PDF</description> <gates> <gate name="P" symbol="NPN-DRIVER" x="0" y="0"/> </gates> <devices> <device name="" package="SOT23"> <connects> <connect gate="P" pin="GND" pad="2"/> <connect gate="P" pin="VIN" pad="1"/> <connect gate="P" pin="VOUT" pad="3"/> </connects> <technologies> <technology name=""> <attribute name="MF" value="ON SEMICONDUCTOR" constant="no"/> <attribute name="MPN" value="MDC3105LT1" constant="no"/> <attribute name="OC_FARNELL" value="1126459" constant="no"/> <attribute name="OC_NEWARK" value="16F6132" constant="no"/> </technology> </technologies> </device> </devices> </deviceset> <deviceset name="MDC3105DMT1" prefix="IC"> <description><b>Integrated Relay, Inductive Load Driver</b><p> Sopurce: U6 OnSemi Inductive Load Driver MDC3105-D.PDF</description> <gates> <gate name="A" symbol="NPN-DRIVER" x="-2.54" y="7.62"/> <gate name="B" symbol="NPN-DRIVER" x="-2.54" y="-7.62"/> </gates> <devices> <device name="" package="SC-74"> <connects> <connect gate="A" pin="GND" pad="1"/> <connect gate="A" pin="VIN" pad="5"/> <connect gate="A" pin="VOUT" pad="6"/> <connect gate="B" pin="GND" pad="4"/> <connect gate="B" pin="VIN" pad="2"/> <connect gate="B" pin="VOUT" pad="3"/> </connects> <technologies> <technology name=""> <attribute name="MF" value="" constant="no"/> <attribute name="MPN" value="MDC3105DMT1G" constant="no"/> <attribute name="OC_FARNELL" value="unknown" constant="no"/> <attribute name="OC_NEWARK" value="04R7836" constant="no"/> </technology> </technologies> </device> </devices> </deviceset> <deviceset name="MDC3105XV6T1" prefix="IC"> <description><b>Integrated Relay, Inductive Load Driver</b><p> Sopurce: U6 OnSemi Inductive Load Driver MDC3105-D.PDF</description> <gates> <gate name="A" symbol="NPN-DRIVER_4C" x="0" y="0"/> </gates> <devices> <device name="" package="SOT-563"> <connects> <connect gate="A" pin="GND" pad="4"/> <connect gate="A" pin="VIN" pad="3"/> <connect gate="A" pin="VOUT" pad="1"/> <connect gate="A" pin="VOUT1" pad="2"/> <connect gate="A" pin="VOUT2" pad="5"/> <connect gate="A" pin="VOUT3" pad="6"/> </connects> <technologies> <technology name=""> <attribute name="MF" value="" constant="no"/> <attribute name="MPN" value="" constant="no"/> <attribute name="OC_FARNELL" value="unknown" constant="no"/> <attribute name="OC_NEWARK" value="unknown" constant="no"/> </technology> </technologies> </device> </devices> </deviceset> <deviceset name="A5191HRT" prefix="IC"> <description><b>HART Modem</b> Single-chip, half-duplex 1200 bits per second FSK modem<p> Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 35</i><br> Source:OnSemi A5191HRT HART Modem Data Sheet.pdf</description> <gates> <gate name="G$1" symbol="A5191HRT" x="0" y="0"/> </gates> <devices> <device name="" package="PLCC28"> <connects> <connect gate="G$1" pin="IAREF" pad="11"/> <connect gate="G$1" pin="ICDREF" pad="12"/> <connect gate="G$1" pin="INRESET" pad="6"/> <connect gate="G$1" pin="INRTS" pad="23"/> <connect gate="G$1" pin="IRXA" pad="16"/> <connect gate="G$1" pin="IRXAC" pad="18"/> <connect gate="G$1" pin="ITXD" pad="24"/> <connect gate="G$1" pin="IXTL" pad="20"/> <connect gate="G$1" pin="OCBIAS" pad="13"/> <connect gate="G$1" pin="OCD" pad="27"/> <connect gate="G$1" pin="ORXAF" pad="17"/> <connect gate="G$1" pin="ORXD" pad="26"/> <connect gate="G$1" pin="OTXA" pad="10"/> <connect gate="G$1" pin="OXTL" pad="19"/> <connect gate="G$1" pin="TEST1" pad="1"/> <connect gate="G$1" pin="TEST10" pad="14"/> <connect gate="G$1" pin="TEST11" pad="25"/> <connect gate="G$1" pin="TEST12" pad="28"/> <connect gate="G$1" pin="TEST2" pad="2"/> <connect gate="G$1" pin="TEST3" pad="3"/> <connect gate="G$1" pin="TEST4" pad="4"/> <connect gate="G$1" pin="TEST5" pad="5"/> <connect gate="G$1" pin="TEST7" pad="7"/> <connect gate="G$1" pin="TEST8" pad="8"/> <connect gate="G$1" pin="TEST9" pad="9"/> <connect gate="G$1" pin="VDD" pad="22"/> <connect gate="G$1" pin="VDDA" pad="15"/> <connect gate="G$1" pin="VSS" pad="21"/> </connects> <technologies> <technology name=""> <attribute name="MF" value="" constant="no"/> <attribute name="MPN" value="A5191HRTPG-XTD" constant="no"/> <attribute name="OC_FARNELL" value="unknown" constant="no"/> <attribute name="OC_NEWARK" value="03P1167" constant="no"/> </technology> </technologies> </device> </devices> </deviceset> <deviceset name="A5191HRTI" prefix="IC"> <description><b>HART Modem</b> Single-chip, half-duplex 1200 bits per second FSK modem<p> Auto generated by <i>make-symbol-device-package-bsdl.ulp Rev. 35</i><br> Source:OnSemi A5191HRT HART Modem Data Sheet.pdf</description> <gates> <gate name="G$1" symbol="A5191HRTI" x="0" y="0"/> </gates> <devices> <device name="" package="LQFP32-7X7MM"> <connects> <connect gate="G$1" pin="IAREF" pad="8"/> <connect gate="G$1" pin="ICDREF" pad="9"/> <connect gate="G$1" pin="INRESET" pad="2"/> <connect gate="G$1" pin="INRTS" pad="22"/> <connect gate="G$1" pin="IRXA" pad="14"/> <connect gate="G$1" pin="IRXAC" pad="16"/> <connect gate="G$1" pin="ITXD" pad="23"/> <connect gate="G$1" pin="IXTL" pad="18"/> <connect gate="G$1" pin="OCBIAS" pad="10"/> <connect gate="G$1" pin="OCD" pad="26"/> <connect gate="G$1" pin="ORXAF" pad="15"/> <connect gate="G$1" pin="ORXD" pad="25"/> <connect gate="G$1" pin="OTXA" pad="7"/> <connect gate="G$1" pin="OXTL" pad="17"/> <connect gate="G$1" pin="TEST1" pad="28"/> <connect gate="G$1" pin="TEST10" pad="11"/> <connect gate="G$1" pin="TEST11" pad="24"/> <connect gate="G$1" pin="TEST12" pad="27"/> <connect gate="G$1" pin="TEST2" pad="29"/> <connect gate="G$1" pin="TEST3" pad="31"/> <connect gate="G$1" pin="TEST4" pad="32"/> <connect gate="G$1" pin="TEST5" pad="1"/> <connect gate="G$1" pin="TEST7" pad="3"/> <connect gate="G$1" pin="TEST8" pad="4"/> <connect gate="G$1" pin="TEST9" pad="5"/> <connect gate="G$1" pin="VDD" pad="21"/> <connect gate="G$1" pin="VDD@1" pad="30"/> <connect gate="G$1" pin="VDDA" pad="13"/> <connect gate="G$1" pin="VSS" pad="6"/> <connect gate="G$1" pin="VSS@1" pad="20"/> <connect gate="G$1" pin="VSSA" pad="12"/> <connect gate="G$1" pin="VSSA@1" pad="19"/> </connects> <technologies> <technology name=""> <attribute name="MF" value="" constant="no"/> <attribute name="MPN" value="A5191HRTLG-XTD" constant="no"/> <attribute name="OC_FARNELL" value="unknown" constant="no"/> <attribute name="OC_NEWARK" value="03P1166" constant="no"/> </technology> </technologies> </device> </devices> </deviceset> <deviceset name="NCP2820" prefix="IC"> <description><b>2.65 W Filterless Class-D Audio Power Amplifier</b><p> Source: <a href="http://www.onsemi.com/pub_link/Collateral/NCP2820-D.PDF"> Data sheet </a></description> <gates> <gate name="G$1" symbol="NCP2820" x="0" y="0"/> </gates> <devices> <device name="" package="FLIP-CHIP9"> <connects> <connect gate="G$1" pin="!SD" pad="C2"/> <connect gate="G$1" pin="GND@1" pad="A2"/> <connect gate="G$1" pin="GND@2" pad="B3"/> <connect gate="G$1" pin="INM" pad="C1"/> <connect gate="G$1" pin="INP" pad="A1"/> <connect gate="G$1" pin="OUTM" pad="A3"/> <connect gate="G$1" pin="OUTP" pad="C3"/> <connect gate="G$1" pin="VP@1" pad="B1"/> <connect gate="G$1" pin="VP@2" pad="B2"/> </connects> <technologies> <technology name=""/> </technologies> </device> </devices> </deviceset> <deviceset name="SA571" prefix="IC"> <description><b>Versatile low cost dual gain control circuit</b><p> Source: <a href="http://www.onsemi.com/pub_link/Collateral/SA571-D.PDF"> Data sheet </a></description> <gates> <gate name="A" symbol="SA571" x="0" y="0"/> </gates> <devices> <device name="N" package="DIL16"> <connects> <connect gate="A" pin="GND" pad="4"/> <connect gate="A" pin="G_CELL_IN1" pad="3"/> <connect gate="A" pin="G_CELL_IN2" pad="14"/> <connect gate="A" pin="INV_IN1" pad="5"/> <connect gate="A" pin="INV_IN2" pad="12"/> <connect gate="A" pin="OUT1" pad="7"/> <connect gate="A" pin="OUT2" pad="10"/> <connect gate="A" pin="RECT_CAP1" pad="1"/> <connect gate="A" pin="RECT_CAP2" pad="16"/> <connect gate="A" pin="RECT_IN1" pad="2"/> <connect gate="A" pin="RECT_IN2" pad="15"/> <connect gate="A" pin="RES_R3_1" pad="6"/> <connect gate="A" pin="RES_R3_2" pad="11"/> <connect gate="A" pin="THD_TRIM1" pad="8"/> <connect gate="A" pin="THD_TRIM2" pad="9"/> <connect gate="A" pin="VCC" pad="13"/> </connects> <technologies> <technology name=""/> </technologies> </device> <device name="D" package="SO16WB"> <connects> <connect gate="A" pin="GND" pad="4"/> <connect gate="A" pin="G_CELL_IN1" pad="3"/> <connect gate="A" pin="G_CELL_IN2" pad="14"/> <connect gate="A" pin="INV_IN1" pad="5"/> <connect gate="A" pin="INV_IN2" pad="12"/> <connect gate="A" pin="OUT1" pad="7"/> <connect gate="A" pin="OUT2" pad="10"/> <connect gate="A" pin="RECT_CAP1" pad="1"/> <connect gate="A" pin="RECT_CAP2" pad="16"/> <connect gate="A" pin="RECT_IN1" pad="2"/> <connect gate="A" pin="RECT_IN2" pad="15"/> <connect gate="A" pin="RES_R3_1" pad="6"/> <connect gate="A" pin="RES_R3_2" pad="11"/> <connect gate="A" pin="THD_TRIM1" pad="8"/> <connect gate="A" pin="THD_TRIM2" pad="9"/> <connect gate="A" pin="VCC" pad="13"/> </connects> <technologies> <technology name=""/> </technologies> </device> </devices> </deviceset> <deviceset name="SA571*" prefix="IC"> <description><b>Versatile low cost dual gain control circuit</b><p> Source: <a href="http://www.onsemi.com/pub_link/Collateral/SA571-D.PDF"> Data sheet </a></description> <gates> <gate name="A" symbol="SA571-G" x="0" y="17.78" addlevel="always"/> <gate name="B" symbol="SA571-G" x="0" y="-15.24" addlevel="always"/> <gate name="P" symbol="PWR2" x="33.02" y="2.54" addlevel="always"/> </gates> <devices> <device name="N" package="DIL16"> <connects> <connect gate="A" pin="G_CELL_IN" pad="3"/> <connect gate="A" pin="INV_IN" pad="5"/> <connect gate="A" pin="OUT" pad="7"/> <connect gate="A" pin="RECT_CAP" pad="1"/> <connect gate="A" pin="RECT_IN" pad="2"/> <connect gate="A" pin="RES_R3" pad="6"/> <connect gate="A" pin="THD_TRIM" pad="8"/> <connect gate="B" pin="G_CELL_IN" pad="14"/> <connect gate="B" pin="INV_IN" pad="12"/> <connect gate="B" pin="OUT" pad="10"/> <connect gate="B" pin="RECT_CAP" pad="16"/> <connect gate="B" pin="RECT_IN" pad="15"/> <connect gate="B" pin="RES_R3" pad="11"/> <connect gate="B" pin="THD_TRIM" pad="9"/> <connect gate="P" pin="GND" pad="4"/> <connect gate="P" pin="VCC" pad="13"/> </connects> <technologies> <technology name=""/> </technologies> </device> <device name="D" package="SO16WB"> <connects> <connect gate="A" pin="G_CELL_IN" pad="3"/> <connect gate="A" pin="INV_IN" pad="5"/> <connect gate="A" pin="OUT" pad="7"/> <connect gate="A" pin="RECT_CAP" pad="1"/> <connect gate="A" pin="RECT_IN" pad="2"/> <connect gate="A" pin="RES_R3" pad="6"/> <connect gate="A" pin="THD_TRIM" pad="8"/> <connect gate="B" pin="G_CELL_IN" pad="14"/> <connect gate="B" pin="INV_IN" pad="12"/> <connect gate="B" pin="OUT" pad="10"/> <connect gate="B" pin="RECT_CAP" pad="16"/> <connect gate="B" pin="RECT_IN" pad="15"/> <connect gate="B" pin="RES_R3" pad="11"/> <connect gate="B" pin="THD_TRIM" pad="9"/> <connect gate="P" pin="GND" pad="4"/> <connect gate="P" pin="VCC" pad="13"/> </connects> <technologies> <technology name=""/> </technologies> </device> </devices> </deviceset> </devicesets> </library> </drawing> </eagle>