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Last update 5 years 7 months by Noelia Scotti
FilesPCBEDU-XILINXProyectoKicad
..
Bank14.bak
Bank14.sch
Bank15.bak
Bank15.sch
Bank35.bak
Bank35.sch
EduCiaaX-cache.lib
EduCiaaX.bak
EduCiaaX.csv
EduCiaaX.erc
EduCiaaX.net
EduCiaaX.pro
EduCiaaX.sch
EduCiaaX.xls
EduCiaaX.xlsx
EduCiaaX.xml
EduCiaaXSchLibrary.bak
EduCiaaXSchLibrary.bck
EduCiaaXSchLibrary.dcm
EduCiaaXSchLibrary.lib
FPGAConfig.bak
FPGAConfig.sch
FPGAPower.bak
FPGAPower.sch
Power.bak
Power.sch
Usb.bak
Usb.sch
XilinxArtix7.bak
XilinxArtix7.bck
XilinxArtix7.dcm
XilinxArtix7.lib
ft2232h.dcm
ft2232h.lib
r_small.bak
r_small.bck
r_small.dcm
r_small.lib
r_small.lib
EESchema-LIBRARY Version 2.3 #encoding utf-8 # # R_ # DEF R_ R 0 10 N N 1 F N F0 "R" 30 20 50 H V L CNN F1 "R_" 30 -40 50 H V L CNN F2 "" 0 0 60 H V C CNN F3 "" 0 0 60 H V C CNN DRAW P 2 0 1 0 0 -70 0 -50 N P 2 0 1 0 0 50 0 70 N P 7 0 1 0 0 50 -30 40 30 20 -30 0 30 -20 -30 -40 0 -50 N X ~ 1 0 100 30 D 40 40 1 1 P X ~ 2 0 -100 30 U 40 40 1 1 P ENDDRAW ENDDEF # #End Library
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