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FilesPCBEDU-XILINXProyectoKicad
..
Bank14.bak
Bank14.sch	view raw
Bank15.bak
Bank15.sch	view raw
Bank35.bak
Bank35.sch	view raw
EduCiaaX-cache.lib
EduCiaaX.bak
EduCiaaX.csv
EduCiaaX.erc
EduCiaaX.net
EduCiaaX.pro
EduCiaaX.sch	view raw
EduCiaaX.xls
EduCiaaX.xlsx
EduCiaaX.xml
EduCiaaXSchLibrary.bak
EduCiaaXSchLibrary.bck
EduCiaaXSchLibrary.dcm
EduCiaaXSchLibrary.lib
FPGAConfig.bak
FPGAConfig.sch	view raw
FPGAPower.bak
FPGAPower.sch	view raw
Power.bak
Power.sch	view raw
Usb.bak
Usb.sch	view raw
XilinxArtix7.bak
XilinxArtix7.bck
XilinxArtix7.dcm
XilinxArtix7.lib
ft2232h.dcm
ft2232h.lib
r_small.bak
r_small.bck
r_small.dcm
r_small.lib

EduCiaaX.proupdate=17/11/2015 11:12:25 a.m.
version=1
last_client=kicad
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
LibName1=r_small
LibName2=power
LibName3=device
LibName4=transistors
LibName5=conn
LibName6=linear
LibName7=regul
LibName8=74xx
LibName9=cmos4000
LibName10=adc-dac
LibName11=memory
LibName12=xilinx
LibName13=microcontrollers
LibName14=dsp
LibName15=microchip
LibName16=analog_switches
LibName17=motorola
LibName18=texas
LibName19=intel
LibName20=audio
LibName21=interface
LibName22=digital-audio
LibName23=philips
LibName24=display
LibName25=cypress
LibName26=siliconi
LibName27=opto
LibName28=atmel
LibName29=contrib
LibName30=XilinxArtix7
LibName31=valves
LibName32=EduCiaaXSchLibrary
LibName33=ft2232h
[general]
version=1
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=
SpiceForceRefPrefix=0
SpiceUseNetNumbers=0
LabSize=60

schneider / test - Files

Files

PCB / ACC / CIAA_ACC / BANK_0.sch

PCB / ACC / CIAA_ACC / BANK_112.sch

PCB / ACC / CIAA_ACC / BANK_500.sch

PCB / ACC / CIAA_ACC / BANK_501.sch

PCB / ACC / CIAA_ACC / BANK_502.sch

PCB / ACC / CIAA_ACC / BANKS_HP.sch

PCB / ACC / CIAA_ACC / BANKS_HR.sch

PCB / ACC / CIAA_ACC / ciaa_acc.kicad_pcb

PCB / ACC / CIAA_ACC / ciaa_acc.sch

PCB / ACC / CIAA_ACC / Digital_IO.sch

PCB / ACC / CIAA_ACC / Expansion.sch

PCB / ACC / CIAA_ACC / FMC-Power.sch

PCB / ACC / CIAA_ACC / FPGA-Power.sch

PCB / ACC / CIAA_ACC / OneBank.sch

PCB / ACC / CIAA_ACC / PMIC.sch

PCB / ACC / CIAA_ACC / Principal.sch

PCB / ACC / CIAA_ACC / RTC-HDMI.sch

PCB / EDU-FSL / EDU_CIAA_K60 / cpu.sch

PCB / EDU-FSL / EDU_CIAA_K60 / EDU_CIAA_K60.kicad_pcb

PCB / EDU-FSL / EDU_CIAA_K60 / EDU_CIAA_K60.sch

PCB / EDU-FSL / EDU_CIAA_K60 / fuente.sch

PCB / EDU-FSL / EDU_CIAA_K60 / gpio.sch

PCB / EDU-FSL / EDU_CIAA_K60 / JTAG.sch

PCB / EDU-FSL / EDU_CIAA_K60 / on_board_io.sch

PCB / EDU-FSL / EDU_CIAA_K60 / rsS485.sch

PCB / EDU-FSL / EDU_CIAA_K60 / usb_otg.sch

PCB / EDU-INTEL / cpu.sch

PCB / EDU-INTEL / edk.kicad_pcb

PCB / EDU-INTEL / edk.sch

PCB / EDU-INTEL / power.sch

PCB / EDU-INTEL / sd_card.sch

PCB / EDU-INTEL / usb.sch

PCB / EDU-NXP / cpu.sch

PCB / EDU-NXP / edu-ciaa-nxp.kicad_pcb

PCB / EDU-NXP / edu-ciaa-nxp.sch

PCB / EDU-NXP / fuente.sch

PCB / EDU-NXP / gpio.sch

PCB / EDU-NXP / ON_BOARD_IO.sch

PCB / EDU-NXP / rsS485_can.sch

PCB / EDU-NXP / usb.sch

PCB / EDU-XILINX / ProyectoKicad / Bank14.sch

PCB / EDU-XILINX / ProyectoKicad / Bank15.sch

PCB / EDU-XILINX / ProyectoKicad / Bank35.sch

PCB / EDU-XILINX / ProyectoKicad / EduCiaaX.sch

PCB / EDU-XILINX / ProyectoKicad / FPGAConfig.sch

PCB / EDU-XILINX / ProyectoKicad / FPGAPower.sch

PCB / EDU-XILINX / ProyectoKicad / Power.sch

PCB / EDU-XILINX / ProyectoKicad / Usb.sch

PCB / FSL-MINI / CIAA_FSL_MINI.kicad_pcb

PCB / FSL-MINI / CIAA_FSL_MINI.sch

PCB / FSL-MINI / cpu.sch

PCB / FSL-MINI / ethernet.sch

PCB / FSL-MINI / fuente.sch

PCB / FSL-MINI / IO.sch

PCB / FSL-MINI / memories.sch

PCB / FSL-MINI / usb_otg.sch

PCB / FSL / CIAA_K60 / analog.sch

PCB / FSL / CIAA_K60 / analog_out.sch

PCB / FSL / CIAA_K60 / CIAA_K60.kicad_pcb

PCB / FSL / CIAA_K60 / CIAA_K60.sch

PCB / FSL / CIAA_K60 / cpu.sch

PCB / FSL / CIAA_K60 / din.sch

PCB / FSL / CIAA_K60 / dout.sch

PCB / FSL / CIAA_K60 / ethernet.sch

PCB / FSL / CIAA_K60 / fuente.sch

PCB / FSL / CIAA_K60 / gpio.sch

PCB / FSL / CIAA_K60 / JTAG.sch

PCB / FSL / CIAA_K60 / memories.sch

PCB / FSL / CIAA_K60 / rsS485_rs232_can.sch

PCB / FSL / CIAA_K60 / usb_otg.sch

PCB / NXP / .kicad_pcb.kicad_pcb

PCB / NXP / analog.sch

PCB / NXP / analog_out.sch

PCB / NXP / ciaa-nxp.kicad_pcb

PCB / NXP / ciaa-nxp.sch

PCB / NXP / cpu.sch

PCB / NXP / din.sch

PCB / NXP / dout.sch