Files
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PCB / ACC / CIAA_ACC / BANK_0.sch
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PCB / ACC / CIAA_ACC / BANK_112.sch
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PCB / ACC / CIAA_ACC / BANK_500.sch
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PCB / ACC / CIAA_ACC / BANK_501.sch
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PCB / ACC / CIAA_ACC / BANK_502.sch
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PCB / ACC / CIAA_ACC / BANKS_HP.sch
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PCB / ACC / CIAA_ACC / BANKS_HR.sch
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PCB / ACC / CIAA_ACC / ciaa_acc.kicad_pcb
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PCB / ACC / CIAA_ACC / ciaa_acc.sch
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PCB / ACC / CIAA_ACC / Digital_IO.sch
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PCB / ACC / CIAA_ACC / Expansion.sch
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PCB / ACC / CIAA_ACC / FMC-Power.sch
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PCB / ACC / CIAA_ACC / FPGA-Power.sch
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PCB / ACC / CIAA_ACC / OneBank.sch
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PCB / ACC / CIAA_ACC / PMIC.sch
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PCB / ACC / CIAA_ACC / Principal.sch
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PCB / ACC / CIAA_ACC / RTC-HDMI.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / cpu.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / EDU_CIAA_K60.kicad_pcb
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PCB / EDU-FSL / EDU_CIAA_K60 / EDU_CIAA_K60.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / fuente.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / gpio.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / JTAG.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / on_board_io.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / rsS485.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / usb_otg.sch
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PCB / EDU-INTEL / cpu.sch
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PCB / EDU-INTEL / edk.kicad_pcb
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PCB / EDU-INTEL / edk.sch
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PCB / EDU-INTEL / power.sch
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PCB / EDU-INTEL / sd_card.sch
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PCB / EDU-INTEL / usb.sch
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PCB / EDU-NXP / cpu.sch
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PCB / EDU-NXP / edu-ciaa-nxp.kicad_pcb
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PCB / EDU-NXP / edu-ciaa-nxp.sch
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PCB / EDU-NXP / fuente.sch
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PCB / EDU-NXP / gpio.sch
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PCB / EDU-NXP / ON_BOARD_IO.sch
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PCB / EDU-NXP / rsS485_can.sch
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PCB / EDU-NXP / usb.sch
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PCB / EDU-XILINX / ProyectoKicad / Bank14.sch
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PCB / EDU-XILINX / ProyectoKicad / Bank15.sch
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PCB / EDU-XILINX / ProyectoKicad / Bank35.sch
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PCB / EDU-XILINX / ProyectoKicad / EduCiaaX.sch
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PCB / EDU-XILINX / ProyectoKicad / FPGAConfig.sch
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PCB / EDU-XILINX / ProyectoKicad / FPGAPower.sch
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PCB / EDU-XILINX / ProyectoKicad / Power.sch
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PCB / EDU-XILINX / ProyectoKicad / Usb.sch
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PCB / FSL-MINI / CIAA_FSL_MINI.kicad_pcb
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PCB / FSL-MINI / CIAA_FSL_MINI.sch
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PCB / FSL-MINI / cpu.sch
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PCB / FSL-MINI / ethernet.sch
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PCB / FSL-MINI / fuente.sch
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PCB / FSL-MINI / IO.sch
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PCB / FSL-MINI / memories.sch
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PCB / FSL-MINI / usb_otg.sch
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PCB / FSL / CIAA_K60 / analog.sch
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PCB / FSL / CIAA_K60 / analog_out.sch
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PCB / FSL / CIAA_K60 / CIAA_K60.kicad_pcb
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PCB / FSL / CIAA_K60 / CIAA_K60.sch
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PCB / FSL / CIAA_K60 / cpu.sch
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PCB / FSL / CIAA_K60 / din.sch
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PCB / FSL / CIAA_K60 / dout.sch
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PCB / FSL / CIAA_K60 / ethernet.sch
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PCB / FSL / CIAA_K60 / fuente.sch
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PCB / FSL / CIAA_K60 / gpio.sch
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PCB / FSL / CIAA_K60 / JTAG.sch
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PCB / FSL / CIAA_K60 / memories.sch
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PCB / FSL / CIAA_K60 / rsS485_rs232_can.sch
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PCB / FSL / CIAA_K60 / usb_otg.sch
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PCB / NXP / .kicad_pcb.kicad_pcb
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PCB / NXP / analog.sch
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PCB / NXP / analog_out.sch
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PCB / NXP / ciaa-nxp.kicad_pcb
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PCB / NXP / ciaa-nxp.sch
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PCB / NXP / cpu.sch
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PCB / NXP / din.sch
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PCB / NXP / dout.sch
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PCB / NXP / ethernet.sch
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PCB / NXP / fuente.sch
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PCB / NXP / gpio.sch
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PCB / NXP / mem.sch
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PCB / NXP / rsS485_rs232_can.sch
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PCB / NXP / usb_otg.sch
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PCB / PIC / analog.sch
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PCB / PIC / analog_out.sch
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PCB / PIC / ciaa-pic.kicad_pcb
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PCB / PIC / ciaa-pic.sch
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PCB / PIC / cpu.sch
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PCB / PIC / din.sch
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PCB / PIC / dout.sch
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PCB / PIC / ethernet.sch
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PCB / PIC / fuente.sch
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PCB / PIC / gpio.sch
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PCB / PIC / JTAG.sch
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PCB / PIC / mem.sch
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PCB / PIC / rsS485_rs232_can.sch
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PCB / PIC / usb_otg.sch
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PCB / pico / cpu.sch
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PCB / pico / debugger.sch
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PCB / pico / picociaa.kicad_pcb
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PCB / pico / picociaa.sch
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PCB / RX / hw / .kicad_pcb.kicad_pcb
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PCB / RX / hw / analog.sch
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PCB / RX / hw / analog_out.sch
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PCB / RX / hw / ciaa-rx.kicad_pcb
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PCB / RX / hw / ciaa-rx.sch
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PCB / RX / hw / cpu.sch
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PCB / RX / hw / din.sch
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PCB / RX / hw / dout.sch
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PCB / RX / hw / ethernet.sch
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PCB / RX / hw / fuente.sch
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PCB / RX / hw / gpio.sch
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PCB / RX / hw / mem.sch
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PCB / RX / hw / rsS485_rs232_can.sch
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PCB / RX / hw / usb_otg.sch
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PCB / Safety / BUS_ISA.sch
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PCB / Safety / CAN.sch
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PCB / Safety / CIAA_Safety_VTI_1.0.kicad_pcb
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PCB / Safety / CIAA_Safety_VTI_1.0.sch
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PCB / Safety / CPU.sch
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PCB / Safety / ETHERNET.sch
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PCB / Safety / MEM_FLASH_SPI.sch
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PCB / Safety / RM48L952.sch
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PCB / Safety / USB HOST - MEM SD.sch
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PCB / Safety / USB OTG.sch
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PCB / Safety / USB.sch
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PCB / Z3R0 / ciaa-z3r0.kicad_pcb
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PCB / Z3R0 / ciaa-z3r0.sch
Last update 5 years 9 months
by
Noelia Scotti
K22X-E9P-NJ.kicad_mod(module K22X-E9P-NJ (layer F.Cu) (tedit 55861FFF) (descr "Connecteur DB9 male couche") (tags "CONN DB9") (fp_text reference J3 (at -2.9713 3.8415) (layer F.SilkS) (effects (font (thickness 0.3048))) ) (fp_text value DB9 (at 1.27 -3.81) (layer F.SilkS) (effects (font (thickness 0.3048))) ) (fp_line (start -9.029 -7.874) (end -9.029 -15.494) (layer F.SilkS) (width 0.3048)) (fp_line (start -9.029 -7.874) (end -9.029 -15.494) (layer F.SilkS) (width 0.3048)) (fp_line (start -9.029 -7.874) (end -9.029 -15.494) (layer F.SilkS) (width 0.3048)) (fp_line (start -9.029 -7.874) (end -9.029 -15.494) (layer F.SilkS) (width 0.3048)) (fp_line (start 16.271 2.126) (end 16.271 -5.494) (layer F.SilkS) (width 0.3048)) (fp_line (start 16.271 2.126) (end 16.271 -5.494) (layer F.SilkS) (width 0.3048)) (fp_line (start 16.271 2.126) (end 16.271 -5.494) (layer F.SilkS) (width 0.3048)) (fp_line (start 16.271 2.126) (end 16.271 -5.494) (layer F.SilkS) (width 0.3048)) (fp_line (start 16.271 -0.874) (end 16.271 -8.494) (layer F.SilkS) (width 0.3048)) (fp_line (start 16.271 -0.874) (end 16.271 -8.494) (layer F.SilkS) (width 0.3048)) (fp_line (start 16.271 -0.874) (end 16.271 -8.494) (layer F.SilkS) (width 0.3048)) (fp_line (start 16.271 -0.874) (end 16.271 -8.494) (layer F.SilkS) (width 0.3048)) (fp_line (start 9.271 -7.874) (end 9.271 -15.494) (layer F.SilkS) (width 0.3048)) (fp_line (start 9.271 -7.874) (end 9.271 -15.494) (layer F.SilkS) (width 0.3048)) (fp_line (start 9.271 -7.874) (end 9.271 -15.494) (layer F.SilkS) (width 0.3048)) (fp_line (start -16.017 -5.494) (end -16.017 2.126) (layer F.SilkS) (width 0.3048)) (fp_line (start -16.017 -5.494) (end -16.017 2.126) (layer F.SilkS) (width 0.3048)) (fp_line (start -16.017 -5.494) (end -16.017 2.126) (layer F.SilkS) (width 0.3048)) (fp_line (start -16.017 -5.494) (end -16.017 2.126) (layer F.SilkS) (width 0.3048)) (fp_line (start -16.017 -8.494) (end -16.017 -0.874) (layer F.SilkS) (width 0.3048)) (fp_line (start -16.017 -8.494) (end -16.017 -0.874) (layer F.SilkS) (width 0.3048)) (fp_line (start -16.017 -8.494) (end -16.017 -0.874) (layer F.SilkS) (width 0.3048)) (fp_line (start -16.129 2.286) (end 16.383 2.286) (layer F.SilkS) (width 0.3048)) (fp_line (start 16.383 -8.494) (end -16.129 -8.494) (layer F.SilkS) (width 0.3048)) (fp_line (start -16.017 -8.494) (end -16.017 -0.874) (layer F.SilkS) (width 0.3048)) (fp_line (start -9.017 -7.874) (end 9.271 -7.874) (layer F.SilkS) (width 0.3048)) (fp_line (start 9.271 -7.874) (end 9.271 -15.494) (layer F.SilkS) (width 0.3048)) (fp_line (start -7.493 -16.13) (end 7.747 -16.13) (layer F.SilkS) (width 0.3048)) (pad 10 thru_hole circle (at 12.827 -1.27) (size 3.81 3.81) (drill 3.048) (layers *.Cu *.Mask F.SilkS)) (pad 11 thru_hole circle (at -12.573 -1.27) (size 3.81 3.81) (drill 3.048) (layers *.Cu *.Mask F.SilkS)) (pad 1 thru_hole rect (at 5.588 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)) (pad 2 thru_hole circle (at 2.794 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)) (pad 3 thru_hole circle (at 0 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)) (pad 4 thru_hole circle (at -2.667 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)) (pad 5 thru_hole circle (at -5.461 1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)) (pad 9 thru_hole circle (at -4.064 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)) (pad 8 thru_hole circle (at -1.27 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)) (pad 7 thru_hole circle (at 1.397 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)) (pad 6 thru_hole circle (at 4.191 -1.27) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)) (model conn_DBxx/db9_male_pin90deg.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) (model footprints/3D/db9_female_pin90deg.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) )