Files
Last update 5 months 1 week
by Masakatsu Honda
stm32f4xx_hal_pwr.lstARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f4xx_hal_pwr.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .section .text.HAL_PWR_DeInit,"ax",%progbits 20 .align 1 21 .global HAL_PWR_DeInit 22 .syntax unified 23 .thumb 24 .thumb_func 26 HAL_PWR_DeInit: 27 .LFB239: 28 .file 1 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c" 1:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 2:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** ****************************************************************************** 3:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @file stm32f4xx_hal_pwr.c 4:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @author MCD Application Team 5:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief PWR HAL module driver. 6:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * functionalities of the Power Controller (PWR) peripheral: 8:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * + Initialization and de-initialization functions 9:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * + Peripheral Control functions 10:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * 11:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** ****************************************************************************** 12:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @attention 13:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * 14:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * Copyright (c) 2017 STMicroelectronics. 15:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * All rights reserved. 16:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * 17:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * This software is licensed under terms that can be found in the LICENSE file in 18:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * the root directory of this software component. 19:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 20:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** ****************************************************************************** 21:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 22:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 23:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Includes ------------------------------------------------------------------*/ 24:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** #include "stm32f4xx_hal.h" 25:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 26:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** @addtogroup STM32F4xx_HAL_Driver 27:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @{ 28:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 29:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 30:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** @defgroup PWR PWR ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 2 31:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief PWR HAL module driver 32:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @{ 33:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 34:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 35:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** #ifdef HAL_PWR_MODULE_ENABLED 36:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 37:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Private typedef -----------------------------------------------------------*/ 38:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Private define ------------------------------------------------------------*/ 39:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** @addtogroup PWR_Private_Constants 40:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @{ 41:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 42:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 43:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask 44:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @{ 45:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 46:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** #define PVD_MODE_IT 0x00010000U 47:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** #define PVD_MODE_EVT 0x00020000U 48:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** #define PVD_RISING_EDGE 0x00000001U 49:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** #define PVD_FALLING_EDGE 0x00000002U 50:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 51:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @} 52:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 53:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 54:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 55:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @} 56:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 57:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Private macro -------------------------------------------------------------*/ 58:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Private variables ---------------------------------------------------------*/ 59:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Private function prototypes -----------------------------------------------*/ 60:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Private functions ---------------------------------------------------------*/ 61:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 62:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions PWR Exported Functions 63:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @{ 64:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 65:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 66:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 67:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Initialization and de-initialization functions 68:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * 69:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** @verbatim 70:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** =============================================================================== 71:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** ##### Initialization and de-initialization functions ##### 72:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** =============================================================================== 73:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** [..] 74:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** After reset, the backup domain (RTC registers, RTC backup data 75:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** registers and backup SRAM) is protected against possible unwanted 76:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** write accesses. 77:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** To enable access to the RTC Domain and RTC registers, proceed as follows: 78:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) Enable the Power Controller (PWR) APB1 interface clock using the 79:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __HAL_RCC_PWR_CLK_ENABLE() macro. 80:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function. 81:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 82:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** @endverbatim 83:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @{ 84:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 85:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 86:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 87:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Deinitializes the HAL PWR peripheral registers to their default reset values. ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 3 88:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None 89:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 90:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_DeInit(void) 91:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 29 .loc 1 91 1 view -0 30 .cfi_startproc 31 @ args = 0, pretend = 0, frame = 0 32 @ frame_needed = 0, uses_anonymous_args = 0 33 @ link register save eliminated. 92:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __HAL_RCC_PWR_FORCE_RESET(); 34 .loc 1 92 3 view .LVU1 35 0000 044B ldr r3, .L2 36 0002 1A6A ldr r2, [r3, #32] 37 0004 42F08052 orr r2, r2, #268435456 38 0008 1A62 str r2, [r3, #32] 93:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __HAL_RCC_PWR_RELEASE_RESET(); 39 .loc 1 93 3 view .LVU2 40 000a 1A6A ldr r2, [r3, #32] 41 000c 22F08052 bic r2, r2, #268435456 42 0010 1A62 str r2, [r3, #32] 94:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 43 .loc 1 94 1 is_stmt 0 view .LVU3 44 0012 7047 bx lr 45 .L3: 46 .align 2 47 .L2: 48 0014 00380240 .word 1073887232 49 .cfi_endproc 50 .LFE239: 52 .section .text.HAL_PWR_EnableBkUpAccess,"ax",%progbits 53 .align 1 54 .global HAL_PWR_EnableBkUpAccess 55 .syntax unified 56 .thumb 57 .thumb_func 59 HAL_PWR_EnableBkUpAccess: 60 .LFB240: 95:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 96:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 97:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Enables access to the backup domain (RTC registers, RTC 98:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * backup data registers and backup SRAM). 99:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the 100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * Backup Domain Access should be kept enabled. 101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note The following sequence is required to bypass the delay between 102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * DBP bit programming and the effective enabling of the backup domain. 103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * Please check the Errata Sheet for more details under "Possible delay 104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * in backup domain protection disabling/enabling after programming the 105:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * DBP bit" section. 106:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None 107:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 108:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_EnableBkUpAccess(void) 109:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 61 .loc 1 109 1 is_stmt 1 view -0 62 .cfi_startproc 63 @ args = 0, pretend = 0, frame = 8 64 @ frame_needed = 0, uses_anonymous_args = 0 65 @ link register save eliminated. ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 4 66 0000 82B0 sub sp, sp, #8 67 .LCFI0: 68 .cfi_def_cfa_offset 8 110:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __IO uint32_t dummyread; 69 .loc 1 110 3 view .LVU5 111:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE; 70 .loc 1 111 3 view .LVU6 71 .loc 1 111 32 is_stmt 0 view .LVU7 72 0002 044B ldr r3, .L6 73 0004 0122 movs r2, #1 74 0006 1A62 str r2, [r3, #32] 112:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** dummyread = PWR->CR; 75 .loc 1 112 3 is_stmt 1 view .LVU8 76 .loc 1 112 18 is_stmt 0 view .LVU9 77 0008 034B ldr r3, .L6+4 78 000a 1B68 ldr r3, [r3] 79 .loc 1 112 13 view .LVU10 80 000c 0193 str r3, [sp, #4] 113:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** UNUSED(dummyread); 81 .loc 1 113 3 is_stmt 1 view .LVU11 82 000e 019B ldr r3, [sp, #4] 114:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 83 .loc 1 114 1 is_stmt 0 view .LVU12 84 0010 02B0 add sp, sp, #8 85 .LCFI1: 86 .cfi_def_cfa_offset 0 87 @ sp needed 88 0012 7047 bx lr 89 .L7: 90 .align 2 91 .L6: 92 0014 00000E42 .word 1108213760 93 0018 00700040 .word 1073770496 94 .cfi_endproc 95 .LFE240: 97 .section .text.HAL_PWR_DisableBkUpAccess,"ax",%progbits 98 .align 1 99 .global HAL_PWR_DisableBkUpAccess 100 .syntax unified 101 .thumb 102 .thumb_func 104 HAL_PWR_DisableBkUpAccess: 105 .LFB241: 115:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 116:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 117:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Disables access to the backup domain (RTC registers, RTC 118:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * backup data registers and backup SRAM). 119:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the 120:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * Backup Domain Access should be kept enabled. 121:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note The following sequence is required to bypass the delay between 122:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * DBP bit programming and the effective disabling of the backup domain. 123:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * Please check the Errata Sheet for more details under "Possible delay 124:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * in backup domain protection disabling/enabling after programming the 125:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * DBP bit" section. 126:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None 127:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 128:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_DisableBkUpAccess(void) ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 5 129:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 106 .loc 1 129 1 is_stmt 1 view -0 107 .cfi_startproc 108 @ args = 0, pretend = 0, frame = 8 109 @ frame_needed = 0, uses_anonymous_args = 0 110 @ link register save eliminated. 111 0000 82B0 sub sp, sp, #8 112 .LCFI2: 113 .cfi_def_cfa_offset 8 130:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __IO uint32_t dummyread; 114 .loc 1 130 3 view .LVU14 131:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** *(__IO uint32_t *) CR_DBP_BB = (uint32_t)DISABLE; 115 .loc 1 131 3 view .LVU15 116 .loc 1 131 32 is_stmt 0 view .LVU16 117 0002 044B ldr r3, .L10 118 0004 0022 movs r2, #0 119 0006 1A62 str r2, [r3, #32] 132:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** dummyread = PWR->CR; 120 .loc 1 132 3 is_stmt 1 view .LVU17 121 .loc 1 132 18 is_stmt 0 view .LVU18 122 0008 034B ldr r3, .L10+4 123 000a 1B68 ldr r3, [r3] 124 .loc 1 132 13 view .LVU19 125 000c 0193 str r3, [sp, #4] 133:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** UNUSED(dummyread); 126 .loc 1 133 3 is_stmt 1 view .LVU20 127 000e 019B ldr r3, [sp, #4] 134:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 128 .loc 1 134 1 is_stmt 0 view .LVU21 129 0010 02B0 add sp, sp, #8 130 .LCFI3: 131 .cfi_def_cfa_offset 0 132 @ sp needed 133 0012 7047 bx lr 134 .L11: 135 .align 2 136 .L10: 137 0014 00000E42 .word 1108213760 138 0018 00700040 .word 1073770496 139 .cfi_endproc 140 .LFE241: 142 .section .text.HAL_PWR_ConfigPVD,"ax",%progbits 143 .align 1 144 .global HAL_PWR_ConfigPVD 145 .syntax unified 146 .thumb 147 .thumb_func 149 HAL_PWR_ConfigPVD: 150 .LVL0: 151 .LFB242: 135:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 136:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 137:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @} 138:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 139:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 140:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions 141:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Low Power modes configuration functions ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 6 142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * 143:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** @verbatim 144:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 145:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** =============================================================================== 146:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** ##### Peripheral Control functions ##### 147:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** =============================================================================== 148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 149:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** *** PVD configuration *** 150:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** ========================= 151:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** [..] 152:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) The PVD is used to monitor the VDD power supply by comparing it to a 153:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR). 154:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower 155:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** than the PVD threshold. This event is internally connected to the EXTI 156:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** line16 and can generate an interrupt if enabled. This is done through 157:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT() macro. 158:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) The PVD is stopped in Standby mode. 159:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 160:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** *** Wake-up pin configuration *** 161:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** ================================ 162:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** [..] 163:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) Wake-up pin is used to wake up the system from Standby mode. This pin is 164:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** forced in input pull-down configuration and is active on rising edges. 165:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) There is one Wake-up pin: Wake-up Pin 1 on PA.00. 166:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (++) For STM32F446xx there are two Wake-Up pins: Pin1 on PA.00 and Pin2 on PC.13 167:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (++) For STM32F410xx/STM32F412xx/STM32F413xx/STM32F423xx there are three Wake-Up pins: 168:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 169:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** *** Low Power modes configuration *** 170:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** ===================================== 171:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** [..] 172:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** The devices feature 3 low-power modes: 173:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running. 174:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) Stop mode: all clocks are stopped, regulator running, regulator 175:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** in low power mode 176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) Standby mode: 1.2V domain powered off. 177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 178:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** *** Sleep mode *** 179:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** ================== 180:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** [..] 181:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) Entry: 182:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(Regulator, SLEEPEntry) 183:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** functions with 184:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction 185:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction 186:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR: Enter SLEEP mode with WFE instruction and 187:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** no clear of pending event before. 188:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 189:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** -@@- The Regulator parameter is not used for the STM32F4 family 190:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** and is kept as parameter just to maintain compatibility with the 191:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** lower power families (STM32L). 192:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) Exit: 193:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** Any peripheral interrupt acknowledged by the nested vectored interrupt 194:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** controller (NVIC) can wake up the device from Sleep mode. 195:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 196:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** *** Stop mode *** 197:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** ================= 198:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** [..] ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 7 199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** In Stop mode, all clocks in the 1.2V domain are stopped, the PLL, the HSI, 200:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** and the HSE RC oscillators are disabled. Internal SRAM and register contents 201:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** are preserved. 202:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** The voltage regulator can be configured either in normal or low-power mode. 203:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** To minimize the consumption In Stop mode, FLASH can be powered off before 204:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** entering the Stop mode using the HAL_PWREx_EnableFlashPowerDown() function. 205:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** It can be switched on again by software after exiting the Stop mode using 206:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** the HAL_PWREx_DisableFlashPowerDown() function. 207:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 208:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) Entry: 209:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** The Stop mode is entered using the HAL_PWR_EnterSTOPMode(Regulator, STOPEntry) 210:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** function with: 211:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (++) Regulator: 212:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+++) Main regulator ON. 213:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+++) Low Power regulator ON. 214:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (++) STOPEntry: 215:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+++) PWR_STOPENTRY_WFI : Enter STOP mode with WFI instruction. 216:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+++) PWR_STOPENTRY_WFE : Enter STOP mode with WFE instruction and 217:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** clear of pending events before. 218:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+++) PWR_STOPENTRY_WFE_NO_EVT_CLEAR : Enter STOP mode with WFE instruction and 219:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** no clear of pending event before. 220:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) Exit: 221:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** Any EXTI Line (Internal or External) configured in Interrupt/Event mode. 222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 223:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** *** Standby mode *** 224:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** ==================== 225:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** [..] 226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) 227:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** The Standby mode allows to achieve the lowest power consumption. It is based 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** on the Cortex-M4 deep sleep mode, with the voltage regulator disabled. 229:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** The 1.2V domain is consequently powered off. The PLL, the HSI oscillator and 230:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** the HSE oscillator are also switched off. SRAM and register contents are lost 231:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** except for the RTC registers, RTC backup registers, backup SRAM and Standby 232:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** circuitry. 233:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 234:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** The voltage regulator is OFF. 235:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 236:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (++) Entry: 237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function. 238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (++) Exit: 239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wake-up, 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** tamper event, time-stamp event, external reset in NRST pin, IWDG reset. 241:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** *** Auto-wake-up (AWU) from low-power mode *** 243:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** ============================================= 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** [..] 245:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 246:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC 247:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** Wake-up event, a tamper event or a time-stamp event, without depending on 248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** an external interrupt (Auto-wake-up mode). 249:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (+) RTC auto-wake-up (AWU) from the Stop and Standby modes 251:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 252:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to 253:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function. 254:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 255:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 8 256:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** is necessary to configure the RTC to detect the tamper or time stamp event using the 257:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions. 258:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 259:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC Wake-up event, it is necessary to 260:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** configure the RTC to generate the RTC Wake-up event using the HAL_RTCEx_SetWakeUpTime 261:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 262:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** @endverbatim 263:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @{ 264:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 265:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 266:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 267:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). 268:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration 269:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * information for the PVD. 270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note Refer to the electrical characteristics of your device datasheet for 271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * more details about the voltage threshold corresponding to each 272:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * detection level. 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None 274:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) 276:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 152 .loc 1 276 1 is_stmt 1 view -0 153 .cfi_startproc 154 @ args = 0, pretend = 0, frame = 0 155 @ frame_needed = 0, uses_anonymous_args = 0 156 @ link register save eliminated. 277:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Check the parameters */ 278:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); 157 .loc 1 278 3 view .LVU23 279:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); 158 .loc 1 279 3 view .LVU24 280:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 281:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Set PLS[7:5] bits according to PVDLevel value */ 282:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); 159 .loc 1 282 3 view .LVU25 160 0000 1E4A ldr r2, .L17 161 0002 1368 ldr r3, [r2] 162 0004 23F0E003 bic r3, r3, #224 163 0008 0168 ldr r1, [r0] 164 000a 0B43 orrs r3, r3, r1 165 000c 1360 str r3, [r2] 283:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 284:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */ 285:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); 166 .loc 1 285 3 view .LVU26 167 000e 1C4B ldr r3, .L17+4 168 0010 5A68 ldr r2, [r3, #4] 169 0012 22F48032 bic r2, r2, #65536 170 0016 5A60 str r2, [r3, #4] 286:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __HAL_PWR_PVD_EXTI_DISABLE_IT(); 171 .loc 1 286 3 view .LVU27 172 0018 1A68 ldr r2, [r3] 173 001a 22F48032 bic r2, r2, #65536 174 001e 1A60 str r2, [r3] 287:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); 175 .loc 1 287 3 view .LVU28 176 0020 9A68 ldr r2, [r3, #8] ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 9 177 0022 22F48032 bic r2, r2, #65536 178 0026 9A60 str r2, [r3, #8] 288:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); 179 .loc 1 288 3 view .LVU29 180 0028 DA68 ldr r2, [r3, #12] 181 002a 22F48032 bic r2, r2, #65536 182 002e DA60 str r2, [r3, #12] 289:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 290:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Configure interrupt mode */ 291:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) 183 .loc 1 291 3 view .LVU30 184 .loc 1 291 17 is_stmt 0 view .LVU31 185 0030 4368 ldr r3, [r0, #4] 186 .loc 1 291 5 view .LVU32 187 0032 13F4803F tst r3, #65536 188 0036 04D0 beq .L13 292:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT(); 189 .loc 1 293 5 is_stmt 1 view .LVU33 190 0038 114A ldr r2, .L17+4 191 003a 1368 ldr r3, [r2] 192 003c 43F48033 orr r3, r3, #65536 193 0040 1360 str r3, [r2] 194 .L13: 294:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 296:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Configure event mode */ 297:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) 195 .loc 1 297 3 view .LVU34 196 .loc 1 297 17 is_stmt 0 view .LVU35 197 0042 4368 ldr r3, [r0, #4] 198 .loc 1 297 5 view .LVU36 199 0044 13F4003F tst r3, #131072 200 0048 04D0 beq .L14 298:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 299:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); 201 .loc 1 299 5 is_stmt 1 view .LVU37 202 004a 0D4A ldr r2, .L17+4 203 004c 5368 ldr r3, [r2, #4] 204 004e 43F48033 orr r3, r3, #65536 205 0052 5360 str r3, [r2, #4] 206 .L14: 300:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 301:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 302:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Configure the edge */ 303:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) 207 .loc 1 303 3 view .LVU38 208 .loc 1 303 17 is_stmt 0 view .LVU39 209 0054 4368 ldr r3, [r0, #4] 210 .loc 1 303 5 view .LVU40 211 0056 13F0010F tst r3, #1 212 005a 04D0 beq .L15 304:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 305:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); 213 .loc 1 305 5 is_stmt 1 view .LVU41 214 005c 084A ldr r2, .L17+4 215 005e 9368 ldr r3, [r2, #8] ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 10 216 0060 43F48033 orr r3, r3, #65536 217 0064 9360 str r3, [r2, #8] 218 .L15: 306:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 307:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 308:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) 219 .loc 1 308 3 view .LVU42 220 .loc 1 308 17 is_stmt 0 view .LVU43 221 0066 4368 ldr r3, [r0, #4] 222 .loc 1 308 5 view .LVU44 223 0068 13F0020F tst r3, #2 224 006c 04D0 beq .L12 309:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 310:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); 225 .loc 1 310 5 is_stmt 1 view .LVU45 226 006e 044A ldr r2, .L17+4 227 0070 D368 ldr r3, [r2, #12] 228 0072 43F48033 orr r3, r3, #65536 229 0076 D360 str r3, [r2, #12] 230 .L12: 311:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 312:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 231 .loc 1 312 1 is_stmt 0 view .LVU46 232 0078 7047 bx lr 233 .L18: 234 007a 00BF .align 2 235 .L17: 236 007c 00700040 .word 1073770496 237 0080 003C0140 .word 1073822720 238 .cfi_endproc 239 .LFE242: 241 .section .text.HAL_PWR_EnablePVD,"ax",%progbits 242 .align 1 243 .global HAL_PWR_EnablePVD 244 .syntax unified 245 .thumb 246 .thumb_func 248 HAL_PWR_EnablePVD: 249 .LFB243: 313:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 314:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 315:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Enables the Power Voltage Detector(PVD). 316:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None 317:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 318:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_EnablePVD(void) 319:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 250 .loc 1 319 1 is_stmt 1 view -0 251 .cfi_startproc 252 @ args = 0, pretend = 0, frame = 0 253 @ frame_needed = 0, uses_anonymous_args = 0 254 @ link register save eliminated. 320:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)ENABLE; 255 .loc 1 320 3 view .LVU48 256 .loc 1 320 33 is_stmt 0 view .LVU49 257 0000 014B ldr r3, .L20 258 0002 0122 movs r2, #1 259 0004 1A61 str r2, [r3, #16] ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 11 321:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 260 .loc 1 321 1 view .LVU50 261 0006 7047 bx lr 262 .L21: 263 .align 2 264 .L20: 265 0008 00000E42 .word 1108213760 266 .cfi_endproc 267 .LFE243: 269 .section .text.HAL_PWR_DisablePVD,"ax",%progbits 270 .align 1 271 .global HAL_PWR_DisablePVD 272 .syntax unified 273 .thumb 274 .thumb_func 276 HAL_PWR_DisablePVD: 277 .LFB244: 322:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 323:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 324:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Disables the Power Voltage Detector(PVD). 325:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None 326:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 327:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_DisablePVD(void) 328:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 278 .loc 1 328 1 is_stmt 1 view -0 279 .cfi_startproc 280 @ args = 0, pretend = 0, frame = 0 281 @ frame_needed = 0, uses_anonymous_args = 0 282 @ link register save eliminated. 329:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)DISABLE; 283 .loc 1 329 3 view .LVU52 284 .loc 1 329 33 is_stmt 0 view .LVU53 285 0000 014B ldr r3, .L23 286 0002 0022 movs r2, #0 287 0004 1A61 str r2, [r3, #16] 330:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 288 .loc 1 330 1 view .LVU54 289 0006 7047 bx lr 290 .L24: 291 .align 2 292 .L23: 293 0008 00000E42 .word 1108213760 294 .cfi_endproc 295 .LFE244: 297 .section .text.HAL_PWR_EnableWakeUpPin,"ax",%progbits 298 .align 1 299 .global HAL_PWR_EnableWakeUpPin 300 .syntax unified 301 .thumb 302 .thumb_func 304 HAL_PWR_EnableWakeUpPin: 305 .LVL1: 306 .LFB245: 331:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 332:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 333:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Enables the Wake-up PINx functionality. 334:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @param WakeUpPinx Specifies the Power Wake-Up pin to enable. ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 12 335:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * This parameter can be one of the following values: 336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_WAKEUP_PIN1 337:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_WAKEUP_PIN2 available only on STM32F410xx/STM32F446xx/STM32F412xx/STM32F413x 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_WAKEUP_PIN3 available only on STM32F410xx/STM32F412xx/STM32F413xx/STM32F423x 339:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 341:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx) 342:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 307 .loc 1 342 1 is_stmt 1 view -0 308 .cfi_startproc 309 @ args = 0, pretend = 0, frame = 0 310 @ frame_needed = 0, uses_anonymous_args = 0 311 @ link register save eliminated. 343:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Check the parameter */ 344:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); 312 .loc 1 344 3 view .LVU56 345:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 346:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Enable the wake up pin */ 347:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** SET_BIT(PWR->CSR, WakeUpPinx); 313 .loc 1 347 3 view .LVU57 314 0000 024A ldr r2, .L26 315 0002 5368 ldr r3, [r2, #4] 316 0004 0343 orrs r3, r3, r0 317 0006 5360 str r3, [r2, #4] 348:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 318 .loc 1 348 1 is_stmt 0 view .LVU58 319 0008 7047 bx lr 320 .L27: 321 000a 00BF .align 2 322 .L26: 323 000c 00700040 .word 1073770496 324 .cfi_endproc 325 .LFE245: 327 .section .text.HAL_PWR_DisableWakeUpPin,"ax",%progbits 328 .align 1 329 .global HAL_PWR_DisableWakeUpPin 330 .syntax unified 331 .thumb 332 .thumb_func 334 HAL_PWR_DisableWakeUpPin: 335 .LVL2: 336 .LFB246: 349:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 350:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 351:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Disables the Wake-up PINx functionality. 352:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @param WakeUpPinx Specifies the Power Wake-Up pin to disable. 353:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * This parameter can be one of the following values: 354:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_WAKEUP_PIN1 355:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_WAKEUP_PIN2 available only on STM32F410xx/STM32F446xx/STM32F412xx/STM32F413x 356:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_WAKEUP_PIN3 available only on STM32F410xx/STM32F412xx/STM32F413xx/STM32F423x 357:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None 358:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 359:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx) 360:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 337 .loc 1 360 1 is_stmt 1 view -0 338 .cfi_startproc 339 @ args = 0, pretend = 0, frame = 0 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 13 340 @ frame_needed = 0, uses_anonymous_args = 0 341 @ link register save eliminated. 361:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Check the parameter */ 362:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); 342 .loc 1 362 3 view .LVU60 363:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 364:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Disable the wake up pin */ 365:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** CLEAR_BIT(PWR->CSR, WakeUpPinx); 343 .loc 1 365 3 view .LVU61 344 0000 024A ldr r2, .L29 345 0002 5368 ldr r3, [r2, #4] 346 0004 23EA0003 bic r3, r3, r0 347 0008 5360 str r3, [r2, #4] 366:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 348 .loc 1 366 1 is_stmt 0 view .LVU62 349 000a 7047 bx lr 350 .L30: 351 .align 2 352 .L29: 353 000c 00700040 .word 1073770496 354 .cfi_endproc 355 .LFE246: 357 .section .text.HAL_PWR_EnterSLEEPMode,"ax",%progbits 358 .align 1 359 .global HAL_PWR_EnterSLEEPMode 360 .syntax unified 361 .thumb 362 .thumb_func 364 HAL_PWR_EnterSLEEPMode: 365 .LVL3: 366 .LFB247: 367:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 368:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 369:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Enters Sleep mode. 370:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * 371:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note In Sleep mode, all I/O pins keep the same state as in Run mode. 372:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * 373:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note In Sleep mode, the systick is stopped to avoid exit from this mode with 374:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * systick interrupt when used as time base for Timeout 375:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * 376:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @param Regulator Specifies the regulator state in SLEEP mode. 377:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * This parameter can be one of the following values: 378:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON 379:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON 380:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note This parameter is not used for the STM32F4 family and is kept as parameter 381:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * just to maintain compatibility with the lower power families. 382:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @param SLEEPEntry Specifies if SLEEP mode in entered with WFI or WFE instruction. 383:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * This parameter can be one of the following values: 384:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_SLEEPENTRY_WFI : Enter SLEEP mode with WFI instruction 385:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_SLEEPENTRY_WFE : Enter SLEEP mode with WFE instruction and 386:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * clear of pending events before. 387:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR : Enter SLEEP mode with WFE instruction and 388:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * no clear of pending event before. 389:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None 390:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 391:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) 392:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 14 367 .loc 1 392 1 is_stmt 1 view -0 368 .cfi_startproc 369 @ args = 0, pretend = 0, frame = 0 370 @ frame_needed = 0, uses_anonymous_args = 0 371 @ link register save eliminated. 393:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Prevent unused argument(s) compilation warning */ 394:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** UNUSED(Regulator); 372 .loc 1 394 3 view .LVU64 395:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 396:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Check the parameters */ 397:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** assert_param(IS_PWR_REGULATOR(Regulator)); 373 .loc 1 397 3 view .LVU65 398:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); 374 .loc 1 398 3 view .LVU66 399:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 400:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Clear SLEEPDEEP bit of Cortex System Control Register */ 401:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); 375 .loc 1 401 3 view .LVU67 376 0000 074A ldr r2, .L36 377 0002 1369 ldr r3, [r2, #16] 378 0004 23F00403 bic r3, r3, #4 379 0008 1361 str r3, [r2, #16] 402:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 403:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Select SLEEP mode entry -------------------------------------------------*/ 404:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** if(SLEEPEntry == PWR_SLEEPENTRY_WFI) 380 .loc 1 404 3 view .LVU68 381 .loc 1 404 5 is_stmt 0 view .LVU69 382 000a 0129 cmp r1, #1 383 000c 05D0 beq .L35 405:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 406:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Request Wait For Interrupt */ 407:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __WFI(); 408:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 409:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** else 410:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 411:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** if(SLEEPEntry != PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR) 384 .loc 1 411 5 is_stmt 1 view .LVU70 385 .loc 1 411 7 is_stmt 0 view .LVU71 386 000e 0329 cmp r1, #3 387 0010 01D0 beq .L34 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 413:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Clear all pending event */ 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __SEV(); 388 .loc 1 414 7 is_stmt 1 view .LVU72 389 .syntax unified 390 @ 414 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c" 1 391 0012 40BF sev 392 @ 0 "" 2 415:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __WFE(); 393 .loc 1 415 7 view .LVU73 394 @ 415 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c" 1 395 0014 20BF wfe 396 @ 0 "" 2 397 .thumb 398 .syntax unified 399 .L34: 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 15 417:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 418:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Request Wait For Event */ 419:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __WFE(); 400 .loc 1 419 5 view .LVU74 401 .syntax unified 402 @ 419 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c" 1 403 0016 20BF wfe 404 @ 0 "" 2 420:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 421:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 405 .loc 1 421 1 is_stmt 0 view .LVU75 406 .thumb 407 .syntax unified 408 0018 7047 bx lr 409 .L35: 407:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 410 .loc 1 407 5 is_stmt 1 view .LVU76 411 .syntax unified 412 @ 407 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c" 1 413 001a 30BF wfi 414 @ 0 "" 2 415 .thumb 416 .syntax unified 417 001c 7047 bx lr 418 .L37: 419 001e 00BF .align 2 420 .L36: 421 0020 00ED00E0 .word -536810240 422 .cfi_endproc 423 .LFE247: 425 .section .text.HAL_PWR_EnterSTOPMode,"ax",%progbits 426 .align 1 427 .global HAL_PWR_EnterSTOPMode 428 .syntax unified 429 .thumb 430 .thumb_func 432 HAL_PWR_EnterSTOPMode: 433 .LVL4: 434 .LFB248: 422:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 423:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Enters Stop mode. 425:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note In Stop mode, all I/O pins keep the same state as in Run mode. 426:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note When exiting Stop mode by issuing an interrupt or a wake-up event, 427:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * the HSI RC oscillator is selected as system clock. 428:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note When the voltage regulator operates in low power mode, an additional 429:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * startup delay is incurred when waking up from Stop mode. 430:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * By keeping the internal regulator ON during Stop mode, the consumption 431:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * is higher although the startup time is reduced. 432:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @param Regulator Specifies the regulator state in Stop mode. 433:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * This parameter can be one of the following values: 434:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON 435:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON 436:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @param STOPEntry Specifies if Stop mode in entered with WFI or WFE instruction. 437:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * This parameter can be one of the following values: 438:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFI : Enter Stop mode with WFI instruction 439:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFE : Enter Stop mode with WFE instruction and ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 16 440:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * clear of pending events before. 441:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFE_NO_EVT_CLEAR : Enter STOP mode with WFE instruction and 442:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * no clear of pending event before. 443:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None 444:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 445:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry) 446:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 435 .loc 1 446 1 view -0 436 .cfi_startproc 437 @ args = 0, pretend = 0, frame = 0 438 @ frame_needed = 0, uses_anonymous_args = 0 439 @ link register save eliminated. 447:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Check the parameters */ 448:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** assert_param(IS_PWR_REGULATOR(Regulator)); 440 .loc 1 448 3 view .LVU78 449:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); 441 .loc 1 449 3 view .LVU79 450:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 451:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Select the regulator state in Stop mode: Set PDDS and LPDS bits according to PWR_Regulator val 452:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS), Regulator); 442 .loc 1 452 3 view .LVU80 443 0000 0C4A ldr r2, .L43 444 0002 1368 ldr r3, [r2] 445 0004 23F00303 bic r3, r3, #3 446 0008 0343 orrs r3, r3, r0 447 000a 1360 str r3, [r2] 453:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 454:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ 455:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); 448 .loc 1 455 3 view .LVU81 449 000c 0A4A ldr r2, .L43+4 450 000e 1369 ldr r3, [r2, #16] 451 0010 43F00403 orr r3, r3, #4 452 0014 1361 str r3, [r2, #16] 456:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 457:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Select Stop mode entry --------------------------------------------------*/ 458:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** if(STOPEntry == PWR_STOPENTRY_WFI) 453 .loc 1 458 3 view .LVU82 454 .loc 1 458 5 is_stmt 0 view .LVU83 455 0016 0129 cmp r1, #1 456 0018 0AD0 beq .L42 459:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 460:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Request Wait For Interrupt */ 461:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __WFI(); 462:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 463:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** else 464:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 465:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** if(STOPEntry != PWR_STOPENTRY_WFE_NO_EVT_CLEAR) 457 .loc 1 465 5 is_stmt 1 view .LVU84 458 .loc 1 465 7 is_stmt 0 view .LVU85 459 001a 0329 cmp r1, #3 460 001c 01D0 beq .L41 466:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 467:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Clear all pending event */ 468:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __SEV(); 461 .loc 1 468 7 is_stmt 1 view .LVU86 462 .syntax unified ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 17 463 @ 468 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c" 1 464 001e 40BF sev 465 @ 0 "" 2 469:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __WFE(); 466 .loc 1 469 7 view .LVU87 467 @ 469 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c" 1 468 0020 20BF wfe 469 @ 0 "" 2 470 .thumb 471 .syntax unified 472 .L41: 470:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 471:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Request Wait For Event */ 472:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __WFE(); 473 .loc 1 472 5 view .LVU88 474 .syntax unified 475 @ 472 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c" 1 476 0022 20BF wfe 477 @ 0 "" 2 478 .thumb 479 .syntax unified 480 .L40: 473:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 474:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Reset SLEEPDEEP bit of Cortex System Control Register */ 475:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); 481 .loc 1 475 3 view .LVU89 482 0024 044A ldr r2, .L43+4 483 0026 1369 ldr r3, [r2, #16] 484 0028 23F00403 bic r3, r3, #4 485 002c 1361 str r3, [r2, #16] 476:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 486 .loc 1 476 1 is_stmt 0 view .LVU90 487 002e 7047 bx lr 488 .L42: 461:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 489 .loc 1 461 5 is_stmt 1 view .LVU91 490 .syntax unified 491 @ 461 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c" 1 492 0030 30BF wfi 493 @ 0 "" 2 494 .thumb 495 .syntax unified 496 0032 F7E7 b .L40 497 .L44: 498 .align 2 499 .L43: 500 0034 00700040 .word 1073770496 501 0038 00ED00E0 .word -536810240 502 .cfi_endproc 503 .LFE248: 505 .section .text.HAL_PWR_EnterSTANDBYMode,"ax",%progbits 506 .align 1 507 .global HAL_PWR_EnterSTANDBYMode 508 .syntax unified 509 .thumb 510 .thumb_func 512 HAL_PWR_EnterSTANDBYMode: ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 18 513 .LFB249: 477:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 478:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 479:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Enters Standby mode. 480:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note In Standby mode, all I/O pins are high impedance except for: 481:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * - Reset pad (still available) 482:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC 483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * Alarm out, or RTC clock calibration out. 484:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * - RTC_AF2 pin (PI8) if configured for tamper or time-stamp. 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * - WKUP pin 1 (PA0) if enabled. 486:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 488:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_EnterSTANDBYMode(void) 489:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 514 .loc 1 489 1 view -0 515 .cfi_startproc 516 @ args = 0, pretend = 0, frame = 0 517 @ frame_needed = 0, uses_anonymous_args = 0 518 @ link register save eliminated. 490:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Select Standby mode */ 491:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** SET_BIT(PWR->CR, PWR_CR_PDDS); 519 .loc 1 491 3 view .LVU93 520 0000 054A ldr r2, .L46 521 0002 1368 ldr r3, [r2] 522 0004 43F00203 orr r3, r3, #2 523 0008 1360 str r3, [r2] 492:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 493:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ 494:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); 524 .loc 1 494 3 view .LVU94 525 000a 044A ldr r2, .L46+4 526 000c 1369 ldr r3, [r2, #16] 527 000e 43F00403 orr r3, r3, #4 528 0012 1361 str r3, [r2, #16] 495:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 496:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* This option is used to ensure that store operations are completed */ 497:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** #if defined ( __CC_ARM) 498:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __force_stores(); 499:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** #endif 500:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Request Wait For Interrupt */ 501:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __WFI(); 529 .loc 1 501 3 view .LVU95 530 .syntax unified 531 @ 501 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c" 1 532 0014 30BF wfi 533 @ 0 "" 2 502:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 534 .loc 1 502 1 is_stmt 0 view .LVU96 535 .thumb 536 .syntax unified 537 0016 7047 bx lr 538 .L47: 539 .align 2 540 .L46: 541 0018 00700040 .word 1073770496 542 001c 00ED00E0 .word -536810240 543 .cfi_endproc ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 19 544 .LFE249: 546 .section .text.HAL_PWR_PVDCallback,"ax",%progbits 547 .align 1 548 .weak HAL_PWR_PVDCallback 549 .syntax unified 550 .thumb 551 .thumb_func 553 HAL_PWR_PVDCallback: 554 .LFB251: 503:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 505:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief This function handles the PWR PVD interrupt request. 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note This API should be called under the PVD_IRQHandler(). 507:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 509:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_PVD_IRQHandler(void) 510:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 511:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Check PWR Exti flag */ 512:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) 513:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 514:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* PWR PVD interrupt user callback */ 515:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** HAL_PWR_PVDCallback(); 516:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 517:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Clear PWR Exti pending bit */ 518:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); 519:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 520:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 521:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 522:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 523:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief PWR PVD interrupt callback 524:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None 525:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 526:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** __weak void HAL_PWR_PVDCallback(void) 527:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 555 .loc 1 527 1 is_stmt 1 view -0 556 .cfi_startproc 557 @ args = 0, pretend = 0, frame = 0 558 @ frame_needed = 0, uses_anonymous_args = 0 559 @ link register save eliminated. 528:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* NOTE : This function Should not be modified, when the callback is needed, 529:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** the HAL_PWR_PVDCallback could be implemented in the user file 530:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 531:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 560 .loc 1 531 1 view .LVU98 561 0000 7047 bx lr 562 .cfi_endproc 563 .LFE251: 565 .section .text.HAL_PWR_PVD_IRQHandler,"ax",%progbits 566 .align 1 567 .global HAL_PWR_PVD_IRQHandler 568 .syntax unified 569 .thumb 570 .thumb_func 572 HAL_PWR_PVD_IRQHandler: 573 .LFB250: 510:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Check PWR Exti flag */ 574 .loc 1 510 1 view -0 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 20 575 .cfi_startproc 576 @ args = 0, pretend = 0, frame = 0 577 @ frame_needed = 0, uses_anonymous_args = 0 578 0000 08B5 push {r3, lr} 579 .LCFI4: 580 .cfi_def_cfa_offset 8 581 .cfi_offset 3, -8 582 .cfi_offset 14, -4 512:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 583 .loc 1 512 3 view .LVU100 512:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 584 .loc 1 512 6 is_stmt 0 view .LVU101 585 0002 064B ldr r3, .L53 586 0004 5B69 ldr r3, [r3, #20] 512:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 587 .loc 1 512 5 view .LVU102 588 0006 13F4803F tst r3, #65536 589 000a 00D1 bne .L52 590 .L49: 520:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 591 .loc 1 520 1 view .LVU103 592 000c 08BD pop {r3, pc} 593 .L52: 515:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 594 .loc 1 515 5 is_stmt 1 view .LVU104 595 000e FFF7FEFF bl HAL_PWR_PVDCallback 596 .LVL5: 518:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 597 .loc 1 518 5 view .LVU105 598 0012 024B ldr r3, .L53 599 0014 4FF48032 mov r2, #65536 600 0018 5A61 str r2, [r3, #20] 520:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 601 .loc 1 520 1 is_stmt 0 view .LVU106 602 001a F7E7 b .L49 603 .L54: 604 .align 2 605 .L53: 606 001c 003C0140 .word 1073822720 607 .cfi_endproc 608 .LFE250: 610 .section .text.HAL_PWR_EnableSleepOnExit,"ax",%progbits 611 .align 1 612 .global HAL_PWR_EnableSleepOnExit 613 .syntax unified 614 .thumb 615 .thumb_func 617 HAL_PWR_EnableSleepOnExit: 618 .LFB252: 532:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 533:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 534:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode. 535:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor 536:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * re-enters SLEEP mode when an interruption handling is over. 537:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * Setting this bit is useful when the processor is expected to run only on 538:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * interruptions handling. 539:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 21 540:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 541:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_EnableSleepOnExit(void) 542:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 619 .loc 1 542 1 is_stmt 1 view -0 620 .cfi_startproc 621 @ args = 0, pretend = 0, frame = 0 622 @ frame_needed = 0, uses_anonymous_args = 0 623 @ link register save eliminated. 543:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Set SLEEPONEXIT bit of Cortex System Control Register */ 544:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); 624 .loc 1 544 3 view .LVU108 625 0000 024A ldr r2, .L56 626 0002 1369 ldr r3, [r2, #16] 627 0004 43F00203 orr r3, r3, #2 628 0008 1361 str r3, [r2, #16] 545:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 629 .loc 1 545 1 is_stmt 0 view .LVU109 630 000a 7047 bx lr 631 .L57: 632 .align 2 633 .L56: 634 000c 00ED00E0 .word -536810240 635 .cfi_endproc 636 .LFE252: 638 .section .text.HAL_PWR_DisableSleepOnExit,"ax",%progbits 639 .align 1 640 .global HAL_PWR_DisableSleepOnExit 641 .syntax unified 642 .thumb 643 .thumb_func 645 HAL_PWR_DisableSleepOnExit: 646 .LFB253: 546:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 547:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 548:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode. 549:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor 550:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * re-enters SLEEP mode when an interruption handling is over. 551:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None 552:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 553:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_DisableSleepOnExit(void) 554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 647 .loc 1 554 1 is_stmt 1 view -0 648 .cfi_startproc 649 @ args = 0, pretend = 0, frame = 0 650 @ frame_needed = 0, uses_anonymous_args = 0 651 @ link register save eliminated. 555:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Clear SLEEPONEXIT bit of Cortex System Control Register */ 556:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); 652 .loc 1 556 3 view .LVU111 653 0000 024A ldr r2, .L59 654 0002 1369 ldr r3, [r2, #16] 655 0004 23F00203 bic r3, r3, #2 656 0008 1361 str r3, [r2, #16] 557:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 657 .loc 1 557 1 is_stmt 0 view .LVU112 658 000a 7047 bx lr 659 .L60: ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 22 660 .align 2 661 .L59: 662 000c 00ED00E0 .word -536810240 663 .cfi_endproc 664 .LFE253: 666 .section .text.HAL_PWR_EnableSEVOnPend,"ax",%progbits 667 .align 1 668 .global HAL_PWR_EnableSEVOnPend 669 .syntax unified 670 .thumb 671 .thumb_func 673 HAL_PWR_EnableSEVOnPend: 674 .LFB254: 558:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 559:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 560:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Enables CORTEX M4 SEVONPEND bit. 561:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes 562:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * WFE to wake up when an interrupt moves from inactive to pended. 563:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None 564:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 565:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_EnableSEVOnPend(void) 566:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 675 .loc 1 566 1 is_stmt 1 view -0 676 .cfi_startproc 677 @ args = 0, pretend = 0, frame = 0 678 @ frame_needed = 0, uses_anonymous_args = 0 679 @ link register save eliminated. 567:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Set SEVONPEND bit of Cortex System Control Register */ 568:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); 680 .loc 1 568 3 view .LVU114 681 0000 024A ldr r2, .L62 682 0002 1369 ldr r3, [r2, #16] 683 0004 43F01003 orr r3, r3, #16 684 0008 1361 str r3, [r2, #16] 569:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 685 .loc 1 569 1 is_stmt 0 view .LVU115 686 000a 7047 bx lr 687 .L63: 688 .align 2 689 .L62: 690 000c 00ED00E0 .word -536810240 691 .cfi_endproc 692 .LFE254: 694 .section .text.HAL_PWR_DisableSEVOnPend,"ax",%progbits 695 .align 1 696 .global HAL_PWR_DisableSEVOnPend 697 .syntax unified 698 .thumb 699 .thumb_func 701 HAL_PWR_DisableSEVOnPend: 702 .LFB255: 570:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** 571:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /** 572:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @brief Disables CORTEX M4 SEVONPEND bit. 573:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes 574:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * WFE to wake up when an interrupt moves from inactive to pended. 575:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** * @retval None ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 23 576:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** */ 577:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** void HAL_PWR_DisableSEVOnPend(void) 578:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** { 703 .loc 1 578 1 is_stmt 1 view -0 704 .cfi_startproc 705 @ args = 0, pretend = 0, frame = 0 706 @ frame_needed = 0, uses_anonymous_args = 0 707 @ link register save eliminated. 579:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** /* Clear SEVONPEND bit of Cortex System Control Register */ 580:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); 708 .loc 1 580 3 view .LVU117 709 0000 024A ldr r2, .L65 710 0002 1369 ldr r3, [r2, #16] 711 0004 23F01003 bic r3, r3, #16 712 0008 1361 str r3, [r2, #16] 581:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c **** } 713 .loc 1 581 1 is_stmt 0 view .LVU118 714 000a 7047 bx lr 715 .L66: 716 .align 2 717 .L65: 718 000c 00ED00E0 .word -536810240 719 .cfi_endproc 720 .LFE255: 722 .text 723 .Letext0: 724 .file 2 "c:\\tools\\gcc-arm-none-eabi-10.3-2021.10-win32\\gcc-arm-none-eabi-10.3-2021.10\\arm-none 725 .file 3 "c:\\tools\\gcc-arm-none-eabi-10.3-2021.10-win32\\gcc-arm-none-eabi-10.3-2021.10\\arm-none 726 .file 4 "Drivers/CMSIS/Include/core_cm4.h" 727 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f405xx.h" 728 .file 6 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" 729 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h" ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s page 24 DEFINED SYMBOLS *ABS*:00000000 stm32f4xx_hal_pwr.c C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:20 .text.HAL_PWR_DeInit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:26 .text.HAL_PWR_DeInit:00000000 HAL_PWR_DeInit C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:48 .text.HAL_PWR_DeInit:00000014 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:53 .text.HAL_PWR_EnableBkUpAccess:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:59 .text.HAL_PWR_EnableBkUpAccess:00000000 HAL_PWR_EnableBkUpAccess C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:92 .text.HAL_PWR_EnableBkUpAccess:00000014 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:98 .text.HAL_PWR_DisableBkUpAccess:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:104 .text.HAL_PWR_DisableBkUpAccess:00000000 HAL_PWR_DisableBkUpAccess C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:137 .text.HAL_PWR_DisableBkUpAccess:00000014 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:143 .text.HAL_PWR_ConfigPVD:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:149 .text.HAL_PWR_ConfigPVD:00000000 HAL_PWR_ConfigPVD C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:236 .text.HAL_PWR_ConfigPVD:0000007c $d C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:242 .text.HAL_PWR_EnablePVD:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:248 .text.HAL_PWR_EnablePVD:00000000 HAL_PWR_EnablePVD C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:265 .text.HAL_PWR_EnablePVD:00000008 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:270 .text.HAL_PWR_DisablePVD:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:276 .text.HAL_PWR_DisablePVD:00000000 HAL_PWR_DisablePVD C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:293 .text.HAL_PWR_DisablePVD:00000008 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:298 .text.HAL_PWR_EnableWakeUpPin:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:304 .text.HAL_PWR_EnableWakeUpPin:00000000 HAL_PWR_EnableWakeUpPin C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:323 .text.HAL_PWR_EnableWakeUpPin:0000000c $d C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:328 .text.HAL_PWR_DisableWakeUpPin:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:334 .text.HAL_PWR_DisableWakeUpPin:00000000 HAL_PWR_DisableWakeUpPin C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:353 .text.HAL_PWR_DisableWakeUpPin:0000000c $d C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:358 .text.HAL_PWR_EnterSLEEPMode:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:364 .text.HAL_PWR_EnterSLEEPMode:00000000 HAL_PWR_EnterSLEEPMode C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:421 .text.HAL_PWR_EnterSLEEPMode:00000020 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:426 .text.HAL_PWR_EnterSTOPMode:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:432 .text.HAL_PWR_EnterSTOPMode:00000000 HAL_PWR_EnterSTOPMode C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:500 .text.HAL_PWR_EnterSTOPMode:00000034 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:506 .text.HAL_PWR_EnterSTANDBYMode:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:512 .text.HAL_PWR_EnterSTANDBYMode:00000000 HAL_PWR_EnterSTANDBYMode C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:541 .text.HAL_PWR_EnterSTANDBYMode:00000018 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:547 .text.HAL_PWR_PVDCallback:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:553 .text.HAL_PWR_PVDCallback:00000000 HAL_PWR_PVDCallback C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:566 .text.HAL_PWR_PVD_IRQHandler:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:572 .text.HAL_PWR_PVD_IRQHandler:00000000 HAL_PWR_PVD_IRQHandler C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:606 .text.HAL_PWR_PVD_IRQHandler:0000001c $d C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:611 .text.HAL_PWR_EnableSleepOnExit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:617 .text.HAL_PWR_EnableSleepOnExit:00000000 HAL_PWR_EnableSleepOnExit C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:634 .text.HAL_PWR_EnableSleepOnExit:0000000c $d C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:639 .text.HAL_PWR_DisableSleepOnExit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:645 .text.HAL_PWR_DisableSleepOnExit:00000000 HAL_PWR_DisableSleepOnExit C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:662 .text.HAL_PWR_DisableSleepOnExit:0000000c $d C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:667 .text.HAL_PWR_EnableSEVOnPend:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:673 .text.HAL_PWR_EnableSEVOnPend:00000000 HAL_PWR_EnableSEVOnPend C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:690 .text.HAL_PWR_EnableSEVOnPend:0000000c $d C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:695 .text.HAL_PWR_DisableSEVOnPend:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:701 .text.HAL_PWR_DisableSEVOnPend:00000000 HAL_PWR_DisableSEVOnPend C:\Users\MHONDA~1\AppData\Local\Temp\ccHCl3o2.s:718 .text.HAL_PWR_DisableSEVOnPend:0000000c $d NO UNDEFINED SYMBOLS