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Last update 5 months 3 weeks
by Masakatsu Honda
stm32f4xx_hal_msp.lstARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f4xx_hal_msp.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .section .text.HAL_MspInit,"ax",%progbits 20 .align 1 21 .global HAL_MspInit 22 .syntax unified 23 .thumb 24 .thumb_func 26 HAL_MspInit: 27 .LFB239: 28 .file 1 "Core/Src/stm32f4xx_hal_msp.c" 1:Core/Src/stm32f4xx_hal_msp.c **** 2:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Header */ 3:Core/Src/stm32f4xx_hal_msp.c **** /** 4:Core/Src/stm32f4xx_hal_msp.c **** ****************************************************************************** 5:Core/Src/stm32f4xx_hal_msp.c **** * @file stm32f4xx_hal_msp.c 6:Core/Src/stm32f4xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization 7:Core/Src/stm32f4xx_hal_msp.c **** * and de-Initialization codes. 8:Core/Src/stm32f4xx_hal_msp.c **** ****************************************************************************** 9:Core/Src/stm32f4xx_hal_msp.c **** * @attention 10:Core/Src/stm32f4xx_hal_msp.c **** * 11:Core/Src/stm32f4xx_hal_msp.c **** * Copyright (c) 2025 STMicroelectronics. 12:Core/Src/stm32f4xx_hal_msp.c **** * All rights reserved. 13:Core/Src/stm32f4xx_hal_msp.c **** * 14:Core/Src/stm32f4xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file 15:Core/Src/stm32f4xx_hal_msp.c **** * in the root directory of this software component. 16:Core/Src/stm32f4xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 17:Core/Src/stm32f4xx_hal_msp.c **** * 18:Core/Src/stm32f4xx_hal_msp.c **** ****************************************************************************** 19:Core/Src/stm32f4xx_hal_msp.c **** */ 20:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Header */ 21:Core/Src/stm32f4xx_hal_msp.c **** 22:Core/Src/stm32f4xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/ 23:Core/Src/stm32f4xx_hal_msp.c **** #include "main.h" 24:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Includes */ 25:Core/Src/stm32f4xx_hal_msp.c **** 26:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Includes */ 27:Core/Src/stm32f4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_adc1; 28:Core/Src/stm32f4xx_hal_msp.c **** 29:Core/Src/stm32f4xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/ 30:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TD */ ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 2 31:Core/Src/stm32f4xx_hal_msp.c **** 32:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TD */ 33:Core/Src/stm32f4xx_hal_msp.c **** 34:Core/Src/stm32f4xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ 35:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Define */ 36:Core/Src/stm32f4xx_hal_msp.c **** 37:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Define */ 38:Core/Src/stm32f4xx_hal_msp.c **** 39:Core/Src/stm32f4xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/ 40:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Macro */ 41:Core/Src/stm32f4xx_hal_msp.c **** 42:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Macro */ 43:Core/Src/stm32f4xx_hal_msp.c **** 44:Core/Src/stm32f4xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/ 45:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN PV */ 46:Core/Src/stm32f4xx_hal_msp.c **** 47:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END PV */ 48:Core/Src/stm32f4xx_hal_msp.c **** 49:Core/Src/stm32f4xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/ 50:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN PFP */ 51:Core/Src/stm32f4xx_hal_msp.c **** 52:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END PFP */ 53:Core/Src/stm32f4xx_hal_msp.c **** 54:Core/Src/stm32f4xx_hal_msp.c **** /* External functions --------------------------------------------------------*/ 55:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */ 56:Core/Src/stm32f4xx_hal_msp.c **** 57:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ExternalFunctions */ 58:Core/Src/stm32f4xx_hal_msp.c **** 59:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN 0 */ 60:Core/Src/stm32f4xx_hal_msp.c **** 61:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END 0 */ 62:Core/Src/stm32f4xx_hal_msp.c **** 63:Core/Src/stm32f4xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); 64:Core/Src/stm32f4xx_hal_msp.c **** /** 65:Core/Src/stm32f4xx_hal_msp.c **** * Initializes the Global MSP. 66:Core/Src/stm32f4xx_hal_msp.c **** */ 67:Core/Src/stm32f4xx_hal_msp.c **** void HAL_MspInit(void) 68:Core/Src/stm32f4xx_hal_msp.c **** { 29 .loc 1 68 1 view -0 30 .cfi_startproc 31 @ args = 0, pretend = 0, frame = 8 32 @ frame_needed = 0, uses_anonymous_args = 0 33 @ link register save eliminated. 34 0000 82B0 sub sp, sp, #8 35 .LCFI0: 36 .cfi_def_cfa_offset 8 69:Core/Src/stm32f4xx_hal_msp.c **** 70:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */ 71:Core/Src/stm32f4xx_hal_msp.c **** 72:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END MspInit 0 */ 73:Core/Src/stm32f4xx_hal_msp.c **** 74:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); 37 .loc 1 74 3 view .LVU1 38 .LBB2: 39 .loc 1 74 3 view .LVU2 40 0002 0021 movs r1, #0 41 0004 0091 str r1, [sp] ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 3 42 .loc 1 74 3 view .LVU3 43 0006 0B4B ldr r3, .L3 44 0008 5A6C ldr r2, [r3, #68] 45 000a 42F48042 orr r2, r2, #16384 46 000e 5A64 str r2, [r3, #68] 47 .loc 1 74 3 view .LVU4 48 0010 5A6C ldr r2, [r3, #68] 49 0012 02F48042 and r2, r2, #16384 50 0016 0092 str r2, [sp] 51 .loc 1 74 3 view .LVU5 52 0018 009A ldr r2, [sp] 53 .LBE2: 54 .loc 1 74 3 view .LVU6 75:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE(); 55 .loc 1 75 3 view .LVU7 56 .LBB3: 57 .loc 1 75 3 view .LVU8 58 001a 0191 str r1, [sp, #4] 59 .loc 1 75 3 view .LVU9 60 001c 1A6C ldr r2, [r3, #64] 61 001e 42F08052 orr r2, r2, #268435456 62 0022 1A64 str r2, [r3, #64] 63 .loc 1 75 3 view .LVU10 64 0024 1B6C ldr r3, [r3, #64] 65 0026 03F08053 and r3, r3, #268435456 66 002a 0193 str r3, [sp, #4] 67 .loc 1 75 3 view .LVU11 68 002c 019B ldr r3, [sp, #4] 69 .LBE3: 70 .loc 1 75 3 view .LVU12 76:Core/Src/stm32f4xx_hal_msp.c **** 77:Core/Src/stm32f4xx_hal_msp.c **** /* System interrupt init*/ 78:Core/Src/stm32f4xx_hal_msp.c **** 79:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */ 80:Core/Src/stm32f4xx_hal_msp.c **** 81:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END MspInit 1 */ 82:Core/Src/stm32f4xx_hal_msp.c **** } 71 .loc 1 82 1 is_stmt 0 view .LVU13 72 002e 02B0 add sp, sp, #8 73 .LCFI1: 74 .cfi_def_cfa_offset 0 75 @ sp needed 76 0030 7047 bx lr 77 .L4: 78 0032 00BF .align 2 79 .L3: 80 0034 00380240 .word 1073887232 81 .cfi_endproc 82 .LFE239: 84 .section .text.HAL_ADC_MspInit,"ax",%progbits 85 .align 1 86 .global HAL_ADC_MspInit 87 .syntax unified 88 .thumb 89 .thumb_func 91 HAL_ADC_MspInit: 92 .LVL0: ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 4 93 .LFB240: 83:Core/Src/stm32f4xx_hal_msp.c **** 84:Core/Src/stm32f4xx_hal_msp.c **** /** 85:Core/Src/stm32f4xx_hal_msp.c **** * @brief ADC MSP Initialization 86:Core/Src/stm32f4xx_hal_msp.c **** * This function configures the hardware resources used in this example 87:Core/Src/stm32f4xx_hal_msp.c **** * @param hadc: ADC handle pointer 88:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 89:Core/Src/stm32f4xx_hal_msp.c **** */ 90:Core/Src/stm32f4xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) 91:Core/Src/stm32f4xx_hal_msp.c **** { 94 .loc 1 91 1 is_stmt 1 view -0 95 .cfi_startproc 96 @ args = 0, pretend = 0, frame = 32 97 @ frame_needed = 0, uses_anonymous_args = 0 98 .loc 1 91 1 is_stmt 0 view .LVU15 99 0000 70B5 push {r4, r5, r6, lr} 100 .LCFI2: 101 .cfi_def_cfa_offset 16 102 .cfi_offset 4, -16 103 .cfi_offset 5, -12 104 .cfi_offset 6, -8 105 .cfi_offset 14, -4 106 0002 88B0 sub sp, sp, #32 107 .LCFI3: 108 .cfi_def_cfa_offset 48 92:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 109 .loc 1 92 3 is_stmt 1 view .LVU16 110 .loc 1 92 20 is_stmt 0 view .LVU17 111 0004 0023 movs r3, #0 112 0006 0393 str r3, [sp, #12] 113 0008 0493 str r3, [sp, #16] 114 000a 0593 str r3, [sp, #20] 115 000c 0693 str r3, [sp, #24] 116 000e 0793 str r3, [sp, #28] 93:Core/Src/stm32f4xx_hal_msp.c **** if(hadc->Instance==ADC1) 117 .loc 1 93 3 is_stmt 1 view .LVU18 118 .loc 1 93 10 is_stmt 0 view .LVU19 119 0010 0268 ldr r2, [r0] 120 .loc 1 93 5 view .LVU20 121 0012 03F18043 add r3, r3, #1073741824 122 0016 03F59033 add r3, r3, #73728 123 001a 9A42 cmp r2, r3 124 001c 01D0 beq .L9 125 .LVL1: 126 .L5: 94:Core/Src/stm32f4xx_hal_msp.c **** { 95:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 0 */ 96:Core/Src/stm32f4xx_hal_msp.c **** 97:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 0 */ 98:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock enable */ 99:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_ENABLE(); 100:Core/Src/stm32f4xx_hal_msp.c **** 101:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 102:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 103:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration 104:Core/Src/stm32f4xx_hal_msp.c **** PC0 ------> ADC1_IN10 105:Core/Src/stm32f4xx_hal_msp.c **** PA0-WKUP ------> ADC1_IN0 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 5 106:Core/Src/stm32f4xx_hal_msp.c **** PA1 ------> ADC1_IN1 107:Core/Src/stm32f4xx_hal_msp.c **** PA2 ------> ADC1_IN2 108:Core/Src/stm32f4xx_hal_msp.c **** PA3 ------> ADC1_IN3 109:Core/Src/stm32f4xx_hal_msp.c **** */ 110:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pin = VOL_CHECK_Pin; 111:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 112:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 113:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(VOL_CHECK_GPIO_Port, &GPIO_InitStruct); 114:Core/Src/stm32f4xx_hal_msp.c **** 115:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pin = SENSOR_FR_Pin|SENSOR_R_Pin|SENSOR_FL_Pin|SENSOR_L_Pin; 116:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 117:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 118:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 119:Core/Src/stm32f4xx_hal_msp.c **** 120:Core/Src/stm32f4xx_hal_msp.c **** /* ADC1 DMA Init */ 121:Core/Src/stm32f4xx_hal_msp.c **** /* ADC1 Init */ 122:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Instance = DMA2_Stream0; 123:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Channel = DMA_CHANNEL_0; 124:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 125:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 126:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 127:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 128:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 129:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR; 130:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 131:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE; 132:Core/Src/stm32f4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 133:Core/Src/stm32f4xx_hal_msp.c **** { 134:Core/Src/stm32f4xx_hal_msp.c **** Error_Handler(); 135:Core/Src/stm32f4xx_hal_msp.c **** } 136:Core/Src/stm32f4xx_hal_msp.c **** 137:Core/Src/stm32f4xx_hal_msp.c **** __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 138:Core/Src/stm32f4xx_hal_msp.c **** 139:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */ 140:Core/Src/stm32f4xx_hal_msp.c **** 141:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */ 142:Core/Src/stm32f4xx_hal_msp.c **** 143:Core/Src/stm32f4xx_hal_msp.c **** } 144:Core/Src/stm32f4xx_hal_msp.c **** 145:Core/Src/stm32f4xx_hal_msp.c **** } 127 .loc 1 145 1 view .LVU21 128 001e 08B0 add sp, sp, #32 129 .LCFI4: 130 .cfi_remember_state 131 .cfi_def_cfa_offset 16 132 @ sp needed 133 0020 70BD pop {r4, r5, r6, pc} 134 .LVL2: 135 .L9: 136 .LCFI5: 137 .cfi_restore_state 138 .loc 1 145 1 view .LVU22 139 0022 0446 mov r4, r0 99:Core/Src/stm32f4xx_hal_msp.c **** 140 .loc 1 99 5 is_stmt 1 view .LVU23 141 .LBB4: 99:Core/Src/stm32f4xx_hal_msp.c **** ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 6 142 .loc 1 99 5 view .LVU24 143 0024 0025 movs r5, #0 144 0026 0095 str r5, [sp] 99:Core/Src/stm32f4xx_hal_msp.c **** 145 .loc 1 99 5 view .LVU25 146 0028 03F58C33 add r3, r3, #71680 147 002c 5A6C ldr r2, [r3, #68] 148 002e 42F48072 orr r2, r2, #256 149 0032 5A64 str r2, [r3, #68] 99:Core/Src/stm32f4xx_hal_msp.c **** 150 .loc 1 99 5 view .LVU26 151 0034 5A6C ldr r2, [r3, #68] 152 0036 02F48072 and r2, r2, #256 153 003a 0092 str r2, [sp] 99:Core/Src/stm32f4xx_hal_msp.c **** 154 .loc 1 99 5 view .LVU27 155 003c 009A ldr r2, [sp] 156 .LBE4: 99:Core/Src/stm32f4xx_hal_msp.c **** 157 .loc 1 99 5 view .LVU28 101:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 158 .loc 1 101 5 view .LVU29 159 .LBB5: 101:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 160 .loc 1 101 5 view .LVU30 161 003e 0195 str r5, [sp, #4] 101:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 162 .loc 1 101 5 view .LVU31 163 0040 1A6B ldr r2, [r3, #48] 164 0042 42F00402 orr r2, r2, #4 165 0046 1A63 str r2, [r3, #48] 101:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 166 .loc 1 101 5 view .LVU32 167 0048 1A6B ldr r2, [r3, #48] 168 004a 02F00402 and r2, r2, #4 169 004e 0192 str r2, [sp, #4] 101:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 170 .loc 1 101 5 view .LVU33 171 0050 019A ldr r2, [sp, #4] 172 .LBE5: 101:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 173 .loc 1 101 5 view .LVU34 102:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration 174 .loc 1 102 5 view .LVU35 175 .LBB6: 102:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration 176 .loc 1 102 5 view .LVU36 177 0052 0295 str r5, [sp, #8] 102:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration 178 .loc 1 102 5 view .LVU37 179 0054 1A6B ldr r2, [r3, #48] 180 0056 42F00102 orr r2, r2, #1 181 005a 1A63 str r2, [r3, #48] 102:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration 182 .loc 1 102 5 view .LVU38 183 005c 1B6B ldr r3, [r3, #48] 184 005e 03F00103 and r3, r3, #1 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 7 185 0062 0293 str r3, [sp, #8] 102:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration 186 .loc 1 102 5 view .LVU39 187 0064 029B ldr r3, [sp, #8] 188 .LBE6: 102:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration 189 .loc 1 102 5 view .LVU40 110:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 190 .loc 1 110 5 view .LVU41 110:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 191 .loc 1 110 25 is_stmt 0 view .LVU42 192 0066 0123 movs r3, #1 193 0068 0393 str r3, [sp, #12] 111:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 194 .loc 1 111 5 is_stmt 1 view .LVU43 111:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 195 .loc 1 111 26 is_stmt 0 view .LVU44 196 006a 0326 movs r6, #3 197 006c 0496 str r6, [sp, #16] 112:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(VOL_CHECK_GPIO_Port, &GPIO_InitStruct); 198 .loc 1 112 5 is_stmt 1 view .LVU45 113:Core/Src/stm32f4xx_hal_msp.c **** 199 .loc 1 113 5 view .LVU46 200 006e 03A9 add r1, sp, #12 201 0070 1448 ldr r0, .L11 202 .LVL3: 113:Core/Src/stm32f4xx_hal_msp.c **** 203 .loc 1 113 5 is_stmt 0 view .LVU47 204 0072 FFF7FEFF bl HAL_GPIO_Init 205 .LVL4: 115:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 206 .loc 1 115 5 is_stmt 1 view .LVU48 115:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 207 .loc 1 115 25 is_stmt 0 view .LVU49 208 0076 0F23 movs r3, #15 209 0078 0393 str r3, [sp, #12] 116:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 210 .loc 1 116 5 is_stmt 1 view .LVU50 116:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 211 .loc 1 116 26 is_stmt 0 view .LVU51 212 007a 0496 str r6, [sp, #16] 117:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 213 .loc 1 117 5 is_stmt 1 view .LVU52 117:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 214 .loc 1 117 26 is_stmt 0 view .LVU53 215 007c 0595 str r5, [sp, #20] 118:Core/Src/stm32f4xx_hal_msp.c **** 216 .loc 1 118 5 is_stmt 1 view .LVU54 217 007e 03A9 add r1, sp, #12 218 0080 1148 ldr r0, .L11+4 219 0082 FFF7FEFF bl HAL_GPIO_Init 220 .LVL5: 122:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Channel = DMA_CHANNEL_0; 221 .loc 1 122 5 view .LVU55 122:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Channel = DMA_CHANNEL_0; 222 .loc 1 122 24 is_stmt 0 view .LVU56 223 0086 1148 ldr r0, .L11+8 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 8 224 0088 114B ldr r3, .L11+12 225 008a 0360 str r3, [r0] 123:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 226 .loc 1 123 5 is_stmt 1 view .LVU57 123:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 227 .loc 1 123 28 is_stmt 0 view .LVU58 228 008c 4560 str r5, [r0, #4] 124:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 229 .loc 1 124 5 is_stmt 1 view .LVU59 124:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 230 .loc 1 124 30 is_stmt 0 view .LVU60 231 008e 8560 str r5, [r0, #8] 125:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 232 .loc 1 125 5 is_stmt 1 view .LVU61 125:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 233 .loc 1 125 30 is_stmt 0 view .LVU62 234 0090 C560 str r5, [r0, #12] 126:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 235 .loc 1 126 5 is_stmt 1 view .LVU63 126:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 236 .loc 1 126 27 is_stmt 0 view .LVU64 237 0092 4FF48063 mov r3, #1024 238 0096 0361 str r3, [r0, #16] 127:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 239 .loc 1 127 5 is_stmt 1 view .LVU65 127:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 240 .loc 1 127 40 is_stmt 0 view .LVU66 241 0098 4FF40063 mov r3, #2048 242 009c 4361 str r3, [r0, #20] 128:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR; 243 .loc 1 128 5 is_stmt 1 view .LVU67 128:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR; 244 .loc 1 128 37 is_stmt 0 view .LVU68 245 009e 4FF40053 mov r3, #8192 246 00a2 8361 str r3, [r0, #24] 129:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 247 .loc 1 129 5 is_stmt 1 view .LVU69 129:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 248 .loc 1 129 25 is_stmt 0 view .LVU70 249 00a4 4FF48073 mov r3, #256 250 00a8 C361 str r3, [r0, #28] 130:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE; 251 .loc 1 130 5 is_stmt 1 view .LVU71 130:Core/Src/stm32f4xx_hal_msp.c **** hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE; 252 .loc 1 130 29 is_stmt 0 view .LVU72 253 00aa 0562 str r5, [r0, #32] 131:Core/Src/stm32f4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 254 .loc 1 131 5 is_stmt 1 view .LVU73 131:Core/Src/stm32f4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 255 .loc 1 131 29 is_stmt 0 view .LVU74 256 00ac 4562 str r5, [r0, #36] 132:Core/Src/stm32f4xx_hal_msp.c **** { 257 .loc 1 132 5 is_stmt 1 view .LVU75 132:Core/Src/stm32f4xx_hal_msp.c **** { 258 .loc 1 132 9 is_stmt 0 view .LVU76 259 00ae FFF7FEFF bl HAL_DMA_Init 260 .LVL6: ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 9 132:Core/Src/stm32f4xx_hal_msp.c **** { 261 .loc 1 132 8 view .LVU77 262 00b2 18B9 cbnz r0, .L10 263 .L7: 137:Core/Src/stm32f4xx_hal_msp.c **** 264 .loc 1 137 5 is_stmt 1 view .LVU78 137:Core/Src/stm32f4xx_hal_msp.c **** 265 .loc 1 137 5 view .LVU79 266 00b4 054B ldr r3, .L11+8 267 00b6 A363 str r3, [r4, #56] 137:Core/Src/stm32f4xx_hal_msp.c **** 268 .loc 1 137 5 view .LVU80 269 00b8 9C63 str r4, [r3, #56] 137:Core/Src/stm32f4xx_hal_msp.c **** 270 .loc 1 137 5 view .LVU81 271 .loc 1 145 1 is_stmt 0 view .LVU82 272 00ba B0E7 b .L5 273 .L10: 134:Core/Src/stm32f4xx_hal_msp.c **** } 274 .loc 1 134 7 is_stmt 1 view .LVU83 275 00bc FFF7FEFF bl Error_Handler 276 .LVL7: 277 00c0 F8E7 b .L7 278 .L12: 279 00c2 00BF .align 2 280 .L11: 281 00c4 00080240 .word 1073874944 282 00c8 00000240 .word 1073872896 283 00cc 00000000 .word hdma_adc1 284 00d0 10640240 .word 1073898512 285 .cfi_endproc 286 .LFE240: 288 .section .text.HAL_ADC_MspDeInit,"ax",%progbits 289 .align 1 290 .global HAL_ADC_MspDeInit 291 .syntax unified 292 .thumb 293 .thumb_func 295 HAL_ADC_MspDeInit: 296 .LVL8: 297 .LFB241: 146:Core/Src/stm32f4xx_hal_msp.c **** 147:Core/Src/stm32f4xx_hal_msp.c **** /** 148:Core/Src/stm32f4xx_hal_msp.c **** * @brief ADC MSP De-Initialization 149:Core/Src/stm32f4xx_hal_msp.c **** * This function freeze the hardware resources used in this example 150:Core/Src/stm32f4xx_hal_msp.c **** * @param hadc: ADC handle pointer 151:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 152:Core/Src/stm32f4xx_hal_msp.c **** */ 153:Core/Src/stm32f4xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) 154:Core/Src/stm32f4xx_hal_msp.c **** { 298 .loc 1 154 1 view -0 299 .cfi_startproc 300 @ args = 0, pretend = 0, frame = 0 301 @ frame_needed = 0, uses_anonymous_args = 0 155:Core/Src/stm32f4xx_hal_msp.c **** if(hadc->Instance==ADC1) 302 .loc 1 155 3 view .LVU85 303 .loc 1 155 10 is_stmt 0 view .LVU86 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 10 304 0000 0268 ldr r2, [r0] 305 .loc 1 155 5 view .LVU87 306 0002 0B4B ldr r3, .L20 307 0004 9A42 cmp r2, r3 308 0006 00D0 beq .L19 309 0008 7047 bx lr 310 .L19: 154:Core/Src/stm32f4xx_hal_msp.c **** if(hadc->Instance==ADC1) 311 .loc 1 154 1 view .LVU88 312 000a 10B5 push {r4, lr} 313 .LCFI6: 314 .cfi_def_cfa_offset 8 315 .cfi_offset 4, -8 316 .cfi_offset 14, -4 317 000c 0446 mov r4, r0 156:Core/Src/stm32f4xx_hal_msp.c **** { 157:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */ 158:Core/Src/stm32f4xx_hal_msp.c **** 159:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */ 160:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock disable */ 161:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_DISABLE(); 318 .loc 1 161 5 is_stmt 1 view .LVU89 319 000e 094A ldr r2, .L20+4 320 0010 536C ldr r3, [r2, #68] 321 0012 23F48073 bic r3, r3, #256 322 0016 5364 str r3, [r2, #68] 162:Core/Src/stm32f4xx_hal_msp.c **** 163:Core/Src/stm32f4xx_hal_msp.c **** /**ADC1 GPIO Configuration 164:Core/Src/stm32f4xx_hal_msp.c **** PC0 ------> ADC1_IN10 165:Core/Src/stm32f4xx_hal_msp.c **** PA0-WKUP ------> ADC1_IN0 166:Core/Src/stm32f4xx_hal_msp.c **** PA1 ------> ADC1_IN1 167:Core/Src/stm32f4xx_hal_msp.c **** PA2 ------> ADC1_IN2 168:Core/Src/stm32f4xx_hal_msp.c **** PA3 ------> ADC1_IN3 169:Core/Src/stm32f4xx_hal_msp.c **** */ 170:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_DeInit(VOL_CHECK_GPIO_Port, VOL_CHECK_Pin); 323 .loc 1 170 5 view .LVU90 324 0018 0121 movs r1, #1 325 001a 0748 ldr r0, .L20+8 326 .LVL9: 327 .loc 1 170 5 is_stmt 0 view .LVU91 328 001c FFF7FEFF bl HAL_GPIO_DeInit 329 .LVL10: 171:Core/Src/stm32f4xx_hal_msp.c **** 172:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, SENSOR_FR_Pin|SENSOR_R_Pin|SENSOR_FL_Pin|SENSOR_L_Pin); 330 .loc 1 172 5 is_stmt 1 view .LVU92 331 0020 0F21 movs r1, #15 332 0022 0648 ldr r0, .L20+12 333 0024 FFF7FEFF bl HAL_GPIO_DeInit 334 .LVL11: 173:Core/Src/stm32f4xx_hal_msp.c **** 174:Core/Src/stm32f4xx_hal_msp.c **** /* ADC1 DMA DeInit */ 175:Core/Src/stm32f4xx_hal_msp.c **** HAL_DMA_DeInit(hadc->DMA_Handle); 335 .loc 1 175 5 view .LVU93 336 0028 A06B ldr r0, [r4, #56] 337 002a FFF7FEFF bl HAL_DMA_DeInit 338 .LVL12: 176:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */ ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 11 177:Core/Src/stm32f4xx_hal_msp.c **** 178:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */ 179:Core/Src/stm32f4xx_hal_msp.c **** } 180:Core/Src/stm32f4xx_hal_msp.c **** 181:Core/Src/stm32f4xx_hal_msp.c **** } 339 .loc 1 181 1 is_stmt 0 view .LVU94 340 002e 10BD pop {r4, pc} 341 .LVL13: 342 .L21: 343 .loc 1 181 1 view .LVU95 344 .align 2 345 .L20: 346 0030 00200140 .word 1073815552 347 0034 00380240 .word 1073887232 348 0038 00080240 .word 1073874944 349 003c 00000240 .word 1073872896 350 .cfi_endproc 351 .LFE241: 353 .section .text.HAL_SPI_MspInit,"ax",%progbits 354 .align 1 355 .global HAL_SPI_MspInit 356 .syntax unified 357 .thumb 358 .thumb_func 360 HAL_SPI_MspInit: 361 .LVL14: 362 .LFB242: 182:Core/Src/stm32f4xx_hal_msp.c **** 183:Core/Src/stm32f4xx_hal_msp.c **** /** 184:Core/Src/stm32f4xx_hal_msp.c **** * @brief SPI MSP Initialization 185:Core/Src/stm32f4xx_hal_msp.c **** * This function configures the hardware resources used in this example 186:Core/Src/stm32f4xx_hal_msp.c **** * @param hspi: SPI handle pointer 187:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 188:Core/Src/stm32f4xx_hal_msp.c **** */ 189:Core/Src/stm32f4xx_hal_msp.c **** void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) 190:Core/Src/stm32f4xx_hal_msp.c **** { 363 .loc 1 190 1 is_stmt 1 view -0 364 .cfi_startproc 365 @ args = 0, pretend = 0, frame = 32 366 @ frame_needed = 0, uses_anonymous_args = 0 367 .loc 1 190 1 is_stmt 0 view .LVU97 368 0000 00B5 push {lr} 369 .LCFI7: 370 .cfi_def_cfa_offset 4 371 .cfi_offset 14, -4 372 0002 89B0 sub sp, sp, #36 373 .LCFI8: 374 .cfi_def_cfa_offset 40 191:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 375 .loc 1 191 3 is_stmt 1 view .LVU98 376 .loc 1 191 20 is_stmt 0 view .LVU99 377 0004 0023 movs r3, #0 378 0006 0393 str r3, [sp, #12] 379 0008 0493 str r3, [sp, #16] 380 000a 0593 str r3, [sp, #20] 381 000c 0693 str r3, [sp, #24] 382 000e 0793 str r3, [sp, #28] ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 12 192:Core/Src/stm32f4xx_hal_msp.c **** if(hspi->Instance==SPI3) 383 .loc 1 192 3 is_stmt 1 view .LVU100 384 .loc 1 192 10 is_stmt 0 view .LVU101 385 0010 0268 ldr r2, [r0] 386 .loc 1 192 5 view .LVU102 387 0012 154B ldr r3, .L26 388 0014 9A42 cmp r2, r3 389 0016 02D0 beq .L25 390 .LVL15: 391 .L22: 193:Core/Src/stm32f4xx_hal_msp.c **** { 194:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN SPI3_MspInit 0 */ 195:Core/Src/stm32f4xx_hal_msp.c **** 196:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END SPI3_MspInit 0 */ 197:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock enable */ 198:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_SPI3_CLK_ENABLE(); 199:Core/Src/stm32f4xx_hal_msp.c **** 200:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 201:Core/Src/stm32f4xx_hal_msp.c **** /**SPI3 GPIO Configuration 202:Core/Src/stm32f4xx_hal_msp.c **** PC10 ------> SPI3_SCK 203:Core/Src/stm32f4xx_hal_msp.c **** PC11 ------> SPI3_MISO 204:Core/Src/stm32f4xx_hal_msp.c **** PC12 ------> SPI3_MOSI 205:Core/Src/stm32f4xx_hal_msp.c **** */ 206:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pin = SCK_Pin|MISO_Pin|MOSI_Pin; 207:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 208:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 209:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 210:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF6_SPI3; 211:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 212:Core/Src/stm32f4xx_hal_msp.c **** 213:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN SPI3_MspInit 1 */ 214:Core/Src/stm32f4xx_hal_msp.c **** 215:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END SPI3_MspInit 1 */ 216:Core/Src/stm32f4xx_hal_msp.c **** 217:Core/Src/stm32f4xx_hal_msp.c **** } 218:Core/Src/stm32f4xx_hal_msp.c **** 219:Core/Src/stm32f4xx_hal_msp.c **** } 392 .loc 1 219 1 view .LVU103 393 0018 09B0 add sp, sp, #36 394 .LCFI9: 395 .cfi_remember_state 396 .cfi_def_cfa_offset 4 397 @ sp needed 398 001a 5DF804FB ldr pc, [sp], #4 399 .LVL16: 400 .L25: 401 .LCFI10: 402 .cfi_restore_state 198:Core/Src/stm32f4xx_hal_msp.c **** 403 .loc 1 198 5 is_stmt 1 view .LVU104 404 .LBB7: 198:Core/Src/stm32f4xx_hal_msp.c **** 405 .loc 1 198 5 view .LVU105 406 001e 0021 movs r1, #0 407 0020 0191 str r1, [sp, #4] 198:Core/Src/stm32f4xx_hal_msp.c **** 408 .loc 1 198 5 view .LVU106 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 13 409 0022 03F5FE33 add r3, r3, #130048 410 0026 1A6C ldr r2, [r3, #64] 411 0028 42F40042 orr r2, r2, #32768 412 002c 1A64 str r2, [r3, #64] 198:Core/Src/stm32f4xx_hal_msp.c **** 413 .loc 1 198 5 view .LVU107 414 002e 1A6C ldr r2, [r3, #64] 415 0030 02F40042 and r2, r2, #32768 416 0034 0192 str r2, [sp, #4] 198:Core/Src/stm32f4xx_hal_msp.c **** 417 .loc 1 198 5 view .LVU108 418 0036 019A ldr r2, [sp, #4] 419 .LBE7: 198:Core/Src/stm32f4xx_hal_msp.c **** 420 .loc 1 198 5 view .LVU109 200:Core/Src/stm32f4xx_hal_msp.c **** /**SPI3 GPIO Configuration 421 .loc 1 200 5 view .LVU110 422 .LBB8: 200:Core/Src/stm32f4xx_hal_msp.c **** /**SPI3 GPIO Configuration 423 .loc 1 200 5 view .LVU111 424 0038 0291 str r1, [sp, #8] 200:Core/Src/stm32f4xx_hal_msp.c **** /**SPI3 GPIO Configuration 425 .loc 1 200 5 view .LVU112 426 003a 1A6B ldr r2, [r3, #48] 427 003c 42F00402 orr r2, r2, #4 428 0040 1A63 str r2, [r3, #48] 200:Core/Src/stm32f4xx_hal_msp.c **** /**SPI3 GPIO Configuration 429 .loc 1 200 5 view .LVU113 430 0042 1B6B ldr r3, [r3, #48] 431 0044 03F00403 and r3, r3, #4 432 0048 0293 str r3, [sp, #8] 200:Core/Src/stm32f4xx_hal_msp.c **** /**SPI3 GPIO Configuration 433 .loc 1 200 5 view .LVU114 434 004a 029B ldr r3, [sp, #8] 435 .LBE8: 200:Core/Src/stm32f4xx_hal_msp.c **** /**SPI3 GPIO Configuration 436 .loc 1 200 5 view .LVU115 206:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 437 .loc 1 206 5 view .LVU116 206:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 438 .loc 1 206 25 is_stmt 0 view .LVU117 439 004c 4FF4E053 mov r3, #7168 440 0050 0393 str r3, [sp, #12] 207:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 441 .loc 1 207 5 is_stmt 1 view .LVU118 207:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 442 .loc 1 207 26 is_stmt 0 view .LVU119 443 0052 0223 movs r3, #2 444 0054 0493 str r3, [sp, #16] 208:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 445 .loc 1 208 5 is_stmt 1 view .LVU120 209:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF6_SPI3; 446 .loc 1 209 5 view .LVU121 209:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF6_SPI3; 447 .loc 1 209 27 is_stmt 0 view .LVU122 448 0056 0323 movs r3, #3 449 0058 0693 str r3, [sp, #24] ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 14 210:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 450 .loc 1 210 5 is_stmt 1 view .LVU123 210:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 451 .loc 1 210 31 is_stmt 0 view .LVU124 452 005a 0623 movs r3, #6 453 005c 0793 str r3, [sp, #28] 211:Core/Src/stm32f4xx_hal_msp.c **** 454 .loc 1 211 5 is_stmt 1 view .LVU125 455 005e 03A9 add r1, sp, #12 456 0060 0248 ldr r0, .L26+4 457 .LVL17: 211:Core/Src/stm32f4xx_hal_msp.c **** 458 .loc 1 211 5 is_stmt 0 view .LVU126 459 0062 FFF7FEFF bl HAL_GPIO_Init 460 .LVL18: 461 .loc 1 219 1 view .LVU127 462 0066 D7E7 b .L22 463 .L27: 464 .align 2 465 .L26: 466 0068 003C0040 .word 1073757184 467 006c 00080240 .word 1073874944 468 .cfi_endproc 469 .LFE242: 471 .section .text.HAL_SPI_MspDeInit,"ax",%progbits 472 .align 1 473 .global HAL_SPI_MspDeInit 474 .syntax unified 475 .thumb 476 .thumb_func 478 HAL_SPI_MspDeInit: 479 .LVL19: 480 .LFB243: 220:Core/Src/stm32f4xx_hal_msp.c **** 221:Core/Src/stm32f4xx_hal_msp.c **** /** 222:Core/Src/stm32f4xx_hal_msp.c **** * @brief SPI MSP De-Initialization 223:Core/Src/stm32f4xx_hal_msp.c **** * This function freeze the hardware resources used in this example 224:Core/Src/stm32f4xx_hal_msp.c **** * @param hspi: SPI handle pointer 225:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 226:Core/Src/stm32f4xx_hal_msp.c **** */ 227:Core/Src/stm32f4xx_hal_msp.c **** void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) 228:Core/Src/stm32f4xx_hal_msp.c **** { 481 .loc 1 228 1 is_stmt 1 view -0 482 .cfi_startproc 483 @ args = 0, pretend = 0, frame = 0 484 @ frame_needed = 0, uses_anonymous_args = 0 485 .loc 1 228 1 is_stmt 0 view .LVU129 486 0000 08B5 push {r3, lr} 487 .LCFI11: 488 .cfi_def_cfa_offset 8 489 .cfi_offset 3, -8 490 .cfi_offset 14, -4 229:Core/Src/stm32f4xx_hal_msp.c **** if(hspi->Instance==SPI3) 491 .loc 1 229 3 is_stmt 1 view .LVU130 492 .loc 1 229 10 is_stmt 0 view .LVU131 493 0002 0268 ldr r2, [r0] 494 .loc 1 229 5 view .LVU132 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 15 495 0004 074B ldr r3, .L32 496 0006 9A42 cmp r2, r3 497 0008 00D0 beq .L31 498 .LVL20: 499 .L28: 230:Core/Src/stm32f4xx_hal_msp.c **** { 231:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN SPI3_MspDeInit 0 */ 232:Core/Src/stm32f4xx_hal_msp.c **** 233:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END SPI3_MspDeInit 0 */ 234:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock disable */ 235:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_SPI3_CLK_DISABLE(); 236:Core/Src/stm32f4xx_hal_msp.c **** 237:Core/Src/stm32f4xx_hal_msp.c **** /**SPI3 GPIO Configuration 238:Core/Src/stm32f4xx_hal_msp.c **** PC10 ------> SPI3_SCK 239:Core/Src/stm32f4xx_hal_msp.c **** PC11 ------> SPI3_MISO 240:Core/Src/stm32f4xx_hal_msp.c **** PC12 ------> SPI3_MOSI 241:Core/Src/stm32f4xx_hal_msp.c **** */ 242:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, SCK_Pin|MISO_Pin|MOSI_Pin); 243:Core/Src/stm32f4xx_hal_msp.c **** 244:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN SPI3_MspDeInit 1 */ 245:Core/Src/stm32f4xx_hal_msp.c **** 246:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END SPI3_MspDeInit 1 */ 247:Core/Src/stm32f4xx_hal_msp.c **** } 248:Core/Src/stm32f4xx_hal_msp.c **** 249:Core/Src/stm32f4xx_hal_msp.c **** } 500 .loc 1 249 1 view .LVU133 501 000a 08BD pop {r3, pc} 502 .LVL21: 503 .L31: 235:Core/Src/stm32f4xx_hal_msp.c **** 504 .loc 1 235 5 is_stmt 1 view .LVU134 505 000c 064A ldr r2, .L32+4 506 000e 136C ldr r3, [r2, #64] 507 0010 23F40043 bic r3, r3, #32768 508 0014 1364 str r3, [r2, #64] 242:Core/Src/stm32f4xx_hal_msp.c **** 509 .loc 1 242 5 view .LVU135 510 0016 4FF4E051 mov r1, #7168 511 001a 0448 ldr r0, .L32+8 512 .LVL22: 242:Core/Src/stm32f4xx_hal_msp.c **** 513 .loc 1 242 5 is_stmt 0 view .LVU136 514 001c FFF7FEFF bl HAL_GPIO_DeInit 515 .LVL23: 516 .loc 1 249 1 view .LVU137 517 0020 F3E7 b .L28 518 .L33: 519 0022 00BF .align 2 520 .L32: 521 0024 003C0040 .word 1073757184 522 0028 00380240 .word 1073887232 523 002c 00080240 .word 1073874944 524 .cfi_endproc 525 .LFE243: 527 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits 528 .align 1 529 .global HAL_TIM_Base_MspInit ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 16 530 .syntax unified 531 .thumb 532 .thumb_func 534 HAL_TIM_Base_MspInit: 535 .LVL24: 536 .LFB244: 250:Core/Src/stm32f4xx_hal_msp.c **** 251:Core/Src/stm32f4xx_hal_msp.c **** /** 252:Core/Src/stm32f4xx_hal_msp.c **** * @brief TIM_Base MSP Initialization 253:Core/Src/stm32f4xx_hal_msp.c **** * This function configures the hardware resources used in this example 254:Core/Src/stm32f4xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer 255:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 256:Core/Src/stm32f4xx_hal_msp.c **** */ 257:Core/Src/stm32f4xx_hal_msp.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) 258:Core/Src/stm32f4xx_hal_msp.c **** { 537 .loc 1 258 1 is_stmt 1 view -0 538 .cfi_startproc 539 @ args = 0, pretend = 0, frame = 16 540 @ frame_needed = 0, uses_anonymous_args = 0 541 .loc 1 258 1 is_stmt 0 view .LVU139 542 0000 00B5 push {lr} 543 .LCFI12: 544 .cfi_def_cfa_offset 4 545 .cfi_offset 14, -4 546 0002 85B0 sub sp, sp, #20 547 .LCFI13: 548 .cfi_def_cfa_offset 24 259:Core/Src/stm32f4xx_hal_msp.c **** if(htim_base->Instance==TIM1) 549 .loc 1 259 3 is_stmt 1 view .LVU140 550 .loc 1 259 15 is_stmt 0 view .LVU141 551 0004 0368 ldr r3, [r0] 552 .loc 1 259 5 view .LVU142 553 0006 284A ldr r2, .L44 554 0008 9342 cmp r3, r2 555 000a 0BD0 beq .L40 260:Core/Src/stm32f4xx_hal_msp.c **** { 261:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 0 */ 262:Core/Src/stm32f4xx_hal_msp.c **** 263:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM1_MspInit 0 */ 264:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock enable */ 265:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_TIM1_CLK_ENABLE(); 266:Core/Src/stm32f4xx_hal_msp.c **** /* TIM1 interrupt Init */ 267:Core/Src/stm32f4xx_hal_msp.c **** HAL_NVIC_SetPriority(TIM1_BRK_TIM9_IRQn, 0, 0); 268:Core/Src/stm32f4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM1_BRK_TIM9_IRQn); 269:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ 270:Core/Src/stm32f4xx_hal_msp.c **** 271:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM1_MspInit 1 */ 272:Core/Src/stm32f4xx_hal_msp.c **** } 273:Core/Src/stm32f4xx_hal_msp.c **** else if(htim_base->Instance==TIM2) 556 .loc 1 273 8 is_stmt 1 view .LVU143 557 .loc 1 273 10 is_stmt 0 view .LVU144 558 000c B3F1804F cmp r3, #1073741824 559 0010 1CD0 beq .L41 274:Core/Src/stm32f4xx_hal_msp.c **** { 275:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 0 */ 276:Core/Src/stm32f4xx_hal_msp.c **** 277:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM2_MspInit 0 */ ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 17 278:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock enable */ 279:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_TIM2_CLK_ENABLE(); 280:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 281:Core/Src/stm32f4xx_hal_msp.c **** 282:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM2_MspInit 1 */ 283:Core/Src/stm32f4xx_hal_msp.c **** } 284:Core/Src/stm32f4xx_hal_msp.c **** else if(htim_base->Instance==TIM3) 560 .loc 1 284 8 is_stmt 1 view .LVU145 561 .loc 1 284 10 is_stmt 0 view .LVU146 562 0012 264A ldr r2, .L44+4 563 0014 9342 cmp r3, r2 564 0016 26D0 beq .L42 285:Core/Src/stm32f4xx_hal_msp.c **** { 286:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 0 */ 287:Core/Src/stm32f4xx_hal_msp.c **** 288:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM3_MspInit 0 */ 289:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock enable */ 290:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_TIM3_CLK_ENABLE(); 291:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 292:Core/Src/stm32f4xx_hal_msp.c **** 293:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM3_MspInit 1 */ 294:Core/Src/stm32f4xx_hal_msp.c **** } 295:Core/Src/stm32f4xx_hal_msp.c **** else if(htim_base->Instance==TIM5) 565 .loc 1 295 8 is_stmt 1 view .LVU147 566 .loc 1 295 10 is_stmt 0 view .LVU148 567 0018 254A ldr r2, .L44+8 568 001a 9342 cmp r3, r2 569 001c 30D0 beq .L43 570 .LVL25: 571 .L34: 296:Core/Src/stm32f4xx_hal_msp.c **** { 297:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM5_MspInit 0 */ 298:Core/Src/stm32f4xx_hal_msp.c **** 299:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM5_MspInit 0 */ 300:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock enable */ 301:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_TIM5_CLK_ENABLE(); 302:Core/Src/stm32f4xx_hal_msp.c **** /* TIM5 interrupt Init */ 303:Core/Src/stm32f4xx_hal_msp.c **** HAL_NVIC_SetPriority(TIM5_IRQn, 0, 0); 304:Core/Src/stm32f4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM5_IRQn); 305:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM5_MspInit 1 */ 306:Core/Src/stm32f4xx_hal_msp.c **** 307:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM5_MspInit 1 */ 308:Core/Src/stm32f4xx_hal_msp.c **** } 309:Core/Src/stm32f4xx_hal_msp.c **** 310:Core/Src/stm32f4xx_hal_msp.c **** } 572 .loc 1 310 1 view .LVU149 573 001e 05B0 add sp, sp, #20 574 .LCFI14: 575 .cfi_remember_state 576 .cfi_def_cfa_offset 4 577 @ sp needed 578 0020 5DF804FB ldr pc, [sp], #4 579 .LVL26: 580 .L40: 581 .LCFI15: 582 .cfi_restore_state 265:Core/Src/stm32f4xx_hal_msp.c **** /* TIM1 interrupt Init */ ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 18 583 .loc 1 265 5 is_stmt 1 view .LVU150 584 .LBB9: 265:Core/Src/stm32f4xx_hal_msp.c **** /* TIM1 interrupt Init */ 585 .loc 1 265 5 view .LVU151 586 0024 0021 movs r1, #0 587 0026 0091 str r1, [sp] 265:Core/Src/stm32f4xx_hal_msp.c **** /* TIM1 interrupt Init */ 588 .loc 1 265 5 view .LVU152 589 0028 224B ldr r3, .L44+12 590 002a 5A6C ldr r2, [r3, #68] 591 002c 42F00102 orr r2, r2, #1 592 0030 5A64 str r2, [r3, #68] 265:Core/Src/stm32f4xx_hal_msp.c **** /* TIM1 interrupt Init */ 593 .loc 1 265 5 view .LVU153 594 0032 5B6C ldr r3, [r3, #68] 595 0034 03F00103 and r3, r3, #1 596 0038 0093 str r3, [sp] 265:Core/Src/stm32f4xx_hal_msp.c **** /* TIM1 interrupt Init */ 597 .loc 1 265 5 view .LVU154 598 003a 009B ldr r3, [sp] 599 .LBE9: 265:Core/Src/stm32f4xx_hal_msp.c **** /* TIM1 interrupt Init */ 600 .loc 1 265 5 view .LVU155 267:Core/Src/stm32f4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM1_BRK_TIM9_IRQn); 601 .loc 1 267 5 view .LVU156 602 003c 0A46 mov r2, r1 603 003e 1820 movs r0, #24 604 .LVL27: 267:Core/Src/stm32f4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM1_BRK_TIM9_IRQn); 605 .loc 1 267 5 is_stmt 0 view .LVU157 606 0040 FFF7FEFF bl HAL_NVIC_SetPriority 607 .LVL28: 268:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspInit 1 */ 608 .loc 1 268 5 is_stmt 1 view .LVU158 609 0044 1820 movs r0, #24 610 0046 FFF7FEFF bl HAL_NVIC_EnableIRQ 611 .LVL29: 612 004a E8E7 b .L34 613 .LVL30: 614 .L41: 279:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 615 .loc 1 279 5 view .LVU159 616 .LBB10: 279:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 617 .loc 1 279 5 view .LVU160 618 004c 0023 movs r3, #0 619 004e 0193 str r3, [sp, #4] 279:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 620 .loc 1 279 5 view .LVU161 621 0050 184B ldr r3, .L44+12 622 0052 1A6C ldr r2, [r3, #64] 623 0054 42F00102 orr r2, r2, #1 624 0058 1A64 str r2, [r3, #64] 279:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 625 .loc 1 279 5 view .LVU162 626 005a 1B6C ldr r3, [r3, #64] 627 005c 03F00103 and r3, r3, #1 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 19 628 0060 0193 str r3, [sp, #4] 279:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 629 .loc 1 279 5 view .LVU163 630 0062 019B ldr r3, [sp, #4] 631 .LBE10: 279:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 632 .loc 1 279 5 view .LVU164 633 0064 DBE7 b .L34 634 .L42: 290:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 635 .loc 1 290 5 view .LVU165 636 .LBB11: 290:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 637 .loc 1 290 5 view .LVU166 638 0066 0023 movs r3, #0 639 0068 0293 str r3, [sp, #8] 290:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 640 .loc 1 290 5 view .LVU167 641 006a 124B ldr r3, .L44+12 642 006c 1A6C ldr r2, [r3, #64] 643 006e 42F00202 orr r2, r2, #2 644 0072 1A64 str r2, [r3, #64] 290:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 645 .loc 1 290 5 view .LVU168 646 0074 1B6C ldr r3, [r3, #64] 647 0076 03F00203 and r3, r3, #2 648 007a 0293 str r3, [sp, #8] 290:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 649 .loc 1 290 5 view .LVU169 650 007c 029B ldr r3, [sp, #8] 651 .LBE11: 290:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 652 .loc 1 290 5 view .LVU170 653 007e CEE7 b .L34 654 .L43: 301:Core/Src/stm32f4xx_hal_msp.c **** /* TIM5 interrupt Init */ 655 .loc 1 301 5 view .LVU171 656 .LBB12: 301:Core/Src/stm32f4xx_hal_msp.c **** /* TIM5 interrupt Init */ 657 .loc 1 301 5 view .LVU172 658 0080 0021 movs r1, #0 659 0082 0391 str r1, [sp, #12] 301:Core/Src/stm32f4xx_hal_msp.c **** /* TIM5 interrupt Init */ 660 .loc 1 301 5 view .LVU173 661 0084 0B4B ldr r3, .L44+12 662 0086 1A6C ldr r2, [r3, #64] 663 0088 42F00802 orr r2, r2, #8 664 008c 1A64 str r2, [r3, #64] 301:Core/Src/stm32f4xx_hal_msp.c **** /* TIM5 interrupt Init */ 665 .loc 1 301 5 view .LVU174 666 008e 1B6C ldr r3, [r3, #64] 667 0090 03F00803 and r3, r3, #8 668 0094 0393 str r3, [sp, #12] 301:Core/Src/stm32f4xx_hal_msp.c **** /* TIM5 interrupt Init */ 669 .loc 1 301 5 view .LVU175 670 0096 039B ldr r3, [sp, #12] 671 .LBE12: ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 20 301:Core/Src/stm32f4xx_hal_msp.c **** /* TIM5 interrupt Init */ 672 .loc 1 301 5 view .LVU176 303:Core/Src/stm32f4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM5_IRQn); 673 .loc 1 303 5 view .LVU177 674 0098 0A46 mov r2, r1 675 009a 3220 movs r0, #50 676 .LVL31: 303:Core/Src/stm32f4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM5_IRQn); 677 .loc 1 303 5 is_stmt 0 view .LVU178 678 009c FFF7FEFF bl HAL_NVIC_SetPriority 679 .LVL32: 304:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM5_MspInit 1 */ 680 .loc 1 304 5 is_stmt 1 view .LVU179 681 00a0 3220 movs r0, #50 682 00a2 FFF7FEFF bl HAL_NVIC_EnableIRQ 683 .LVL33: 684 .loc 1 310 1 is_stmt 0 view .LVU180 685 00a6 BAE7 b .L34 686 .L45: 687 .align 2 688 .L44: 689 00a8 00000140 .word 1073807360 690 00ac 00040040 .word 1073742848 691 00b0 000C0040 .word 1073744896 692 00b4 00380240 .word 1073887232 693 .cfi_endproc 694 .LFE244: 696 .section .text.HAL_TIM_OC_MspInit,"ax",%progbits 697 .align 1 698 .global HAL_TIM_OC_MspInit 699 .syntax unified 700 .thumb 701 .thumb_func 703 HAL_TIM_OC_MspInit: 704 .LVL34: 705 .LFB245: 311:Core/Src/stm32f4xx_hal_msp.c **** 312:Core/Src/stm32f4xx_hal_msp.c **** /** 313:Core/Src/stm32f4xx_hal_msp.c **** * @brief TIM_OC MSP Initialization 314:Core/Src/stm32f4xx_hal_msp.c **** * This function configures the hardware resources used in this example 315:Core/Src/stm32f4xx_hal_msp.c **** * @param htim_oc: TIM_OC handle pointer 316:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 317:Core/Src/stm32f4xx_hal_msp.c **** */ 318:Core/Src/stm32f4xx_hal_msp.c **** void HAL_TIM_OC_MspInit(TIM_HandleTypeDef* htim_oc) 319:Core/Src/stm32f4xx_hal_msp.c **** { 706 .loc 1 319 1 is_stmt 1 view -0 707 .cfi_startproc 708 @ args = 0, pretend = 0, frame = 32 709 @ frame_needed = 0, uses_anonymous_args = 0 710 .loc 1 319 1 is_stmt 0 view .LVU182 711 0000 00B5 push {lr} 712 .LCFI16: 713 .cfi_def_cfa_offset 4 714 .cfi_offset 14, -4 715 0002 89B0 sub sp, sp, #36 716 .LCFI17: 717 .cfi_def_cfa_offset 40 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 21 320:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 718 .loc 1 320 3 is_stmt 1 view .LVU183 719 .loc 1 320 20 is_stmt 0 view .LVU184 720 0004 0023 movs r3, #0 721 0006 0393 str r3, [sp, #12] 722 0008 0493 str r3, [sp, #16] 723 000a 0593 str r3, [sp, #20] 724 000c 0693 str r3, [sp, #24] 725 000e 0793 str r3, [sp, #28] 321:Core/Src/stm32f4xx_hal_msp.c **** if(htim_oc->Instance==TIM4) 726 .loc 1 321 3 is_stmt 1 view .LVU185 727 .loc 1 321 13 is_stmt 0 view .LVU186 728 0010 0268 ldr r2, [r0] 729 .loc 1 321 5 view .LVU187 730 0012 134B ldr r3, .L50 731 0014 9A42 cmp r2, r3 732 0016 02D0 beq .L49 733 .LVL35: 734 .L46: 322:Core/Src/stm32f4xx_hal_msp.c **** { 323:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspInit 0 */ 324:Core/Src/stm32f4xx_hal_msp.c **** 325:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM4_MspInit 0 */ 326:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock enable */ 327:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_TIM4_CLK_ENABLE(); 328:Core/Src/stm32f4xx_hal_msp.c **** 329:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 330:Core/Src/stm32f4xx_hal_msp.c **** /**TIM4 GPIO Configuration 331:Core/Src/stm32f4xx_hal_msp.c **** PB6 ------> TIM4_CH1 332:Core/Src/stm32f4xx_hal_msp.c **** PB7 ------> TIM4_CH2 333:Core/Src/stm32f4xx_hal_msp.c **** */ 334:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pin = EC_L_A_Pin|EC_L_B_Pin; 335:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 336:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 337:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 338:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM4; 339:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 340:Core/Src/stm32f4xx_hal_msp.c **** 341:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspInit 1 */ 342:Core/Src/stm32f4xx_hal_msp.c **** 343:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM4_MspInit 1 */ 344:Core/Src/stm32f4xx_hal_msp.c **** 345:Core/Src/stm32f4xx_hal_msp.c **** } 346:Core/Src/stm32f4xx_hal_msp.c **** 347:Core/Src/stm32f4xx_hal_msp.c **** } 735 .loc 1 347 1 view .LVU188 736 0018 09B0 add sp, sp, #36 737 .LCFI18: 738 .cfi_remember_state 739 .cfi_def_cfa_offset 4 740 @ sp needed 741 001a 5DF804FB ldr pc, [sp], #4 742 .LVL36: 743 .L49: 744 .LCFI19: 745 .cfi_restore_state 327:Core/Src/stm32f4xx_hal_msp.c **** ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 22 746 .loc 1 327 5 is_stmt 1 view .LVU189 747 .LBB13: 327:Core/Src/stm32f4xx_hal_msp.c **** 748 .loc 1 327 5 view .LVU190 749 001e 0021 movs r1, #0 750 0020 0191 str r1, [sp, #4] 327:Core/Src/stm32f4xx_hal_msp.c **** 751 .loc 1 327 5 view .LVU191 752 0022 03F50C33 add r3, r3, #143360 753 0026 1A6C ldr r2, [r3, #64] 754 0028 42F00402 orr r2, r2, #4 755 002c 1A64 str r2, [r3, #64] 327:Core/Src/stm32f4xx_hal_msp.c **** 756 .loc 1 327 5 view .LVU192 757 002e 1A6C ldr r2, [r3, #64] 758 0030 02F00402 and r2, r2, #4 759 0034 0192 str r2, [sp, #4] 327:Core/Src/stm32f4xx_hal_msp.c **** 760 .loc 1 327 5 view .LVU193 761 0036 019A ldr r2, [sp, #4] 762 .LBE13: 327:Core/Src/stm32f4xx_hal_msp.c **** 763 .loc 1 327 5 view .LVU194 329:Core/Src/stm32f4xx_hal_msp.c **** /**TIM4 GPIO Configuration 764 .loc 1 329 5 view .LVU195 765 .LBB14: 329:Core/Src/stm32f4xx_hal_msp.c **** /**TIM4 GPIO Configuration 766 .loc 1 329 5 view .LVU196 767 0038 0291 str r1, [sp, #8] 329:Core/Src/stm32f4xx_hal_msp.c **** /**TIM4 GPIO Configuration 768 .loc 1 329 5 view .LVU197 769 003a 1A6B ldr r2, [r3, #48] 770 003c 42F00202 orr r2, r2, #2 771 0040 1A63 str r2, [r3, #48] 329:Core/Src/stm32f4xx_hal_msp.c **** /**TIM4 GPIO Configuration 772 .loc 1 329 5 view .LVU198 773 0042 1B6B ldr r3, [r3, #48] 774 0044 03F00203 and r3, r3, #2 775 0048 0293 str r3, [sp, #8] 329:Core/Src/stm32f4xx_hal_msp.c **** /**TIM4 GPIO Configuration 776 .loc 1 329 5 view .LVU199 777 004a 029B ldr r3, [sp, #8] 778 .LBE14: 329:Core/Src/stm32f4xx_hal_msp.c **** /**TIM4 GPIO Configuration 779 .loc 1 329 5 view .LVU200 334:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 780 .loc 1 334 5 view .LVU201 334:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 781 .loc 1 334 25 is_stmt 0 view .LVU202 782 004c C023 movs r3, #192 783 004e 0393 str r3, [sp, #12] 335:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 784 .loc 1 335 5 is_stmt 1 view .LVU203 335:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 785 .loc 1 335 26 is_stmt 0 view .LVU204 786 0050 0223 movs r3, #2 787 0052 0493 str r3, [sp, #16] ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 23 336:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 788 .loc 1 336 5 is_stmt 1 view .LVU205 337:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM4; 789 .loc 1 337 5 view .LVU206 338:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 790 .loc 1 338 5 view .LVU207 338:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 791 .loc 1 338 31 is_stmt 0 view .LVU208 792 0054 0793 str r3, [sp, #28] 339:Core/Src/stm32f4xx_hal_msp.c **** 793 .loc 1 339 5 is_stmt 1 view .LVU209 794 0056 03A9 add r1, sp, #12 795 0058 0248 ldr r0, .L50+4 796 .LVL37: 339:Core/Src/stm32f4xx_hal_msp.c **** 797 .loc 1 339 5 is_stmt 0 view .LVU210 798 005a FFF7FEFF bl HAL_GPIO_Init 799 .LVL38: 800 .loc 1 347 1 view .LVU211 801 005e DBE7 b .L46 802 .L51: 803 .align 2 804 .L50: 805 0060 00080040 .word 1073743872 806 0064 00040240 .word 1073873920 807 .cfi_endproc 808 .LFE245: 810 .section .text.HAL_TIM_Encoder_MspInit,"ax",%progbits 811 .align 1 812 .global HAL_TIM_Encoder_MspInit 813 .syntax unified 814 .thumb 815 .thumb_func 817 HAL_TIM_Encoder_MspInit: 818 .LVL39: 819 .LFB246: 348:Core/Src/stm32f4xx_hal_msp.c **** 349:Core/Src/stm32f4xx_hal_msp.c **** /** 350:Core/Src/stm32f4xx_hal_msp.c **** * @brief TIM_Encoder MSP Initialization 351:Core/Src/stm32f4xx_hal_msp.c **** * This function configures the hardware resources used in this example 352:Core/Src/stm32f4xx_hal_msp.c **** * @param htim_encoder: TIM_Encoder handle pointer 353:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 354:Core/Src/stm32f4xx_hal_msp.c **** */ 355:Core/Src/stm32f4xx_hal_msp.c **** void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder) 356:Core/Src/stm32f4xx_hal_msp.c **** { 820 .loc 1 356 1 is_stmt 1 view -0 821 .cfi_startproc 822 @ args = 0, pretend = 0, frame = 32 823 @ frame_needed = 0, uses_anonymous_args = 0 824 .loc 1 356 1 is_stmt 0 view .LVU213 825 0000 00B5 push {lr} 826 .LCFI20: 827 .cfi_def_cfa_offset 4 828 .cfi_offset 14, -4 829 0002 89B0 sub sp, sp, #36 830 .LCFI21: 831 .cfi_def_cfa_offset 40 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 24 357:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 832 .loc 1 357 3 is_stmt 1 view .LVU214 833 .loc 1 357 20 is_stmt 0 view .LVU215 834 0004 0023 movs r3, #0 835 0006 0393 str r3, [sp, #12] 836 0008 0493 str r3, [sp, #16] 837 000a 0593 str r3, [sp, #20] 838 000c 0693 str r3, [sp, #24] 839 000e 0793 str r3, [sp, #28] 358:Core/Src/stm32f4xx_hal_msp.c **** if(htim_encoder->Instance==TIM8) 840 .loc 1 358 3 is_stmt 1 view .LVU216 841 .loc 1 358 18 is_stmt 0 view .LVU217 842 0010 0268 ldr r2, [r0] 843 .loc 1 358 5 view .LVU218 844 0012 03F18043 add r3, r3, #1073741824 845 0016 03F58233 add r3, r3, #66560 846 001a 9A42 cmp r2, r3 847 001c 02D0 beq .L55 848 .LVL40: 849 .L52: 359:Core/Src/stm32f4xx_hal_msp.c **** { 360:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 0 */ 361:Core/Src/stm32f4xx_hal_msp.c **** 362:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM8_MspInit 0 */ 363:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock enable */ 364:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_TIM8_CLK_ENABLE(); 365:Core/Src/stm32f4xx_hal_msp.c **** 366:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 367:Core/Src/stm32f4xx_hal_msp.c **** /**TIM8 GPIO Configuration 368:Core/Src/stm32f4xx_hal_msp.c **** PC6 ------> TIM8_CH1 369:Core/Src/stm32f4xx_hal_msp.c **** PC7 ------> TIM8_CH2 370:Core/Src/stm32f4xx_hal_msp.c **** */ 371:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pin = EC_R_A_Pin|EC_R_B_Pin; 372:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 373:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 374:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 375:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF3_TIM8; 376:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 377:Core/Src/stm32f4xx_hal_msp.c **** 378:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 1 */ 379:Core/Src/stm32f4xx_hal_msp.c **** 380:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM8_MspInit 1 */ 381:Core/Src/stm32f4xx_hal_msp.c **** 382:Core/Src/stm32f4xx_hal_msp.c **** } 383:Core/Src/stm32f4xx_hal_msp.c **** 384:Core/Src/stm32f4xx_hal_msp.c **** } 850 .loc 1 384 1 view .LVU219 851 001e 09B0 add sp, sp, #36 852 .LCFI22: 853 .cfi_remember_state 854 .cfi_def_cfa_offset 4 855 @ sp needed 856 0020 5DF804FB ldr pc, [sp], #4 857 .LVL41: 858 .L55: 859 .LCFI23: 860 .cfi_restore_state ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 25 364:Core/Src/stm32f4xx_hal_msp.c **** 861 .loc 1 364 5 is_stmt 1 view .LVU220 862 .LBB15: 364:Core/Src/stm32f4xx_hal_msp.c **** 863 .loc 1 364 5 view .LVU221 864 0024 0021 movs r1, #0 865 0026 0191 str r1, [sp, #4] 364:Core/Src/stm32f4xx_hal_msp.c **** 866 .loc 1 364 5 view .LVU222 867 0028 03F59A33 add r3, r3, #78848 868 002c 5A6C ldr r2, [r3, #68] 869 002e 42F00202 orr r2, r2, #2 870 0032 5A64 str r2, [r3, #68] 364:Core/Src/stm32f4xx_hal_msp.c **** 871 .loc 1 364 5 view .LVU223 872 0034 5A6C ldr r2, [r3, #68] 873 0036 02F00202 and r2, r2, #2 874 003a 0192 str r2, [sp, #4] 364:Core/Src/stm32f4xx_hal_msp.c **** 875 .loc 1 364 5 view .LVU224 876 003c 019A ldr r2, [sp, #4] 877 .LBE15: 364:Core/Src/stm32f4xx_hal_msp.c **** 878 .loc 1 364 5 view .LVU225 366:Core/Src/stm32f4xx_hal_msp.c **** /**TIM8 GPIO Configuration 879 .loc 1 366 5 view .LVU226 880 .LBB16: 366:Core/Src/stm32f4xx_hal_msp.c **** /**TIM8 GPIO Configuration 881 .loc 1 366 5 view .LVU227 882 003e 0291 str r1, [sp, #8] 366:Core/Src/stm32f4xx_hal_msp.c **** /**TIM8 GPIO Configuration 883 .loc 1 366 5 view .LVU228 884 0040 1A6B ldr r2, [r3, #48] 885 0042 42F00402 orr r2, r2, #4 886 0046 1A63 str r2, [r3, #48] 366:Core/Src/stm32f4xx_hal_msp.c **** /**TIM8 GPIO Configuration 887 .loc 1 366 5 view .LVU229 888 0048 1B6B ldr r3, [r3, #48] 889 004a 03F00403 and r3, r3, #4 890 004e 0293 str r3, [sp, #8] 366:Core/Src/stm32f4xx_hal_msp.c **** /**TIM8 GPIO Configuration 891 .loc 1 366 5 view .LVU230 892 0050 029B ldr r3, [sp, #8] 893 .LBE16: 366:Core/Src/stm32f4xx_hal_msp.c **** /**TIM8 GPIO Configuration 894 .loc 1 366 5 view .LVU231 371:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 895 .loc 1 371 5 view .LVU232 371:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 896 .loc 1 371 25 is_stmt 0 view .LVU233 897 0052 C023 movs r3, #192 898 0054 0393 str r3, [sp, #12] 372:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 899 .loc 1 372 5 is_stmt 1 view .LVU234 372:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 900 .loc 1 372 26 is_stmt 0 view .LVU235 901 0056 0223 movs r3, #2 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 26 902 0058 0493 str r3, [sp, #16] 373:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 903 .loc 1 373 5 is_stmt 1 view .LVU236 374:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF3_TIM8; 904 .loc 1 374 5 view .LVU237 375:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 905 .loc 1 375 5 view .LVU238 375:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 906 .loc 1 375 31 is_stmt 0 view .LVU239 907 005a 0323 movs r3, #3 908 005c 0793 str r3, [sp, #28] 376:Core/Src/stm32f4xx_hal_msp.c **** 909 .loc 1 376 5 is_stmt 1 view .LVU240 910 005e 03A9 add r1, sp, #12 911 0060 0148 ldr r0, .L56 912 .LVL42: 376:Core/Src/stm32f4xx_hal_msp.c **** 913 .loc 1 376 5 is_stmt 0 view .LVU241 914 0062 FFF7FEFF bl HAL_GPIO_Init 915 .LVL43: 916 .loc 1 384 1 view .LVU242 917 0066 DAE7 b .L52 918 .L57: 919 .align 2 920 .L56: 921 0068 00080240 .word 1073874944 922 .cfi_endproc 923 .LFE246: 925 .section .text.HAL_TIM_MspPostInit,"ax",%progbits 926 .align 1 927 .global HAL_TIM_MspPostInit 928 .syntax unified 929 .thumb 930 .thumb_func 932 HAL_TIM_MspPostInit: 933 .LVL44: 934 .LFB247: 385:Core/Src/stm32f4xx_hal_msp.c **** 386:Core/Src/stm32f4xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) 387:Core/Src/stm32f4xx_hal_msp.c **** { 935 .loc 1 387 1 is_stmt 1 view -0 936 .cfi_startproc 937 @ args = 0, pretend = 0, frame = 32 938 @ frame_needed = 0, uses_anonymous_args = 0 939 .loc 1 387 1 is_stmt 0 view .LVU244 940 0000 70B5 push {r4, r5, r6, lr} 941 .LCFI24: 942 .cfi_def_cfa_offset 16 943 .cfi_offset 4, -16 944 .cfi_offset 5, -12 945 .cfi_offset 6, -8 946 .cfi_offset 14, -4 947 0002 88B0 sub sp, sp, #32 948 .LCFI25: 949 .cfi_def_cfa_offset 48 388:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 950 .loc 1 388 3 is_stmt 1 view .LVU245 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 27 951 .loc 1 388 20 is_stmt 0 view .LVU246 952 0004 0023 movs r3, #0 953 0006 0393 str r3, [sp, #12] 954 0008 0493 str r3, [sp, #16] 955 000a 0593 str r3, [sp, #20] 956 000c 0693 str r3, [sp, #24] 957 000e 0793 str r3, [sp, #28] 389:Core/Src/stm32f4xx_hal_msp.c **** if(htim->Instance==TIM2) 958 .loc 1 389 3 is_stmt 1 view .LVU247 959 .loc 1 389 10 is_stmt 0 view .LVU248 960 0010 0368 ldr r3, [r0] 961 .loc 1 389 5 view .LVU249 962 0012 B3F1804F cmp r3, #1073741824 963 0016 04D0 beq .L62 390:Core/Src/stm32f4xx_hal_msp.c **** { 391:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspPostInit 0 */ 392:Core/Src/stm32f4xx_hal_msp.c **** 393:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM2_MspPostInit 0 */ 394:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 395:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 396:Core/Src/stm32f4xx_hal_msp.c **** /**TIM2 GPIO Configuration 397:Core/Src/stm32f4xx_hal_msp.c **** PA5 ------> TIM2_CH1 398:Core/Src/stm32f4xx_hal_msp.c **** PB11 ------> TIM2_CH4 399:Core/Src/stm32f4xx_hal_msp.c **** */ 400:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pin = MOTOR_L_PWM_Pin; 401:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 402:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 403:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 404:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 405:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(MOTOR_L_PWM_GPIO_Port, &GPIO_InitStruct); 406:Core/Src/stm32f4xx_hal_msp.c **** 407:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pin = MOTOR_R_PWM_Pin; 408:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 409:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 410:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 411:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 412:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(MOTOR_R_PWM_GPIO_Port, &GPIO_InitStruct); 413:Core/Src/stm32f4xx_hal_msp.c **** 414:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspPostInit 1 */ 415:Core/Src/stm32f4xx_hal_msp.c **** 416:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM2_MspPostInit 1 */ 417:Core/Src/stm32f4xx_hal_msp.c **** } 418:Core/Src/stm32f4xx_hal_msp.c **** else if(htim->Instance==TIM3) 964 .loc 1 418 8 is_stmt 1 view .LVU250 965 .loc 1 418 10 is_stmt 0 view .LVU251 966 0018 234A ldr r2, .L64 967 001a 9342 cmp r3, r2 968 001c 2ED0 beq .L63 969 .LVL45: 970 .L58: 419:Core/Src/stm32f4xx_hal_msp.c **** { 420:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspPostInit 0 */ 421:Core/Src/stm32f4xx_hal_msp.c **** 422:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM3_MspPostInit 0 */ 423:Core/Src/stm32f4xx_hal_msp.c **** 424:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 425:Core/Src/stm32f4xx_hal_msp.c **** /**TIM3 GPIO Configuration ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 28 426:Core/Src/stm32f4xx_hal_msp.c **** PB4 ------> TIM3_CH1 427:Core/Src/stm32f4xx_hal_msp.c **** PB5 ------> TIM3_CH2 428:Core/Src/stm32f4xx_hal_msp.c **** */ 429:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pin = FAN_Pin|BUZZER_Pin; 430:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 431:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 432:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 433:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; 434:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 435:Core/Src/stm32f4xx_hal_msp.c **** 436:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspPostInit 1 */ 437:Core/Src/stm32f4xx_hal_msp.c **** 438:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM3_MspPostInit 1 */ 439:Core/Src/stm32f4xx_hal_msp.c **** } 440:Core/Src/stm32f4xx_hal_msp.c **** 441:Core/Src/stm32f4xx_hal_msp.c **** } 971 .loc 1 441 1 view .LVU252 972 001e 08B0 add sp, sp, #32 973 .LCFI26: 974 .cfi_remember_state 975 .cfi_def_cfa_offset 16 976 @ sp needed 977 0020 70BD pop {r4, r5, r6, pc} 978 .LVL46: 979 .L62: 980 .LCFI27: 981 .cfi_restore_state 394:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 982 .loc 1 394 5 is_stmt 1 view .LVU253 983 .LBB17: 394:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 984 .loc 1 394 5 view .LVU254 985 0022 0024 movs r4, #0 986 0024 0094 str r4, [sp] 394:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 987 .loc 1 394 5 view .LVU255 988 0026 03F50E33 add r3, r3, #145408 989 002a 1A6B ldr r2, [r3, #48] 990 002c 42F00102 orr r2, r2, #1 991 0030 1A63 str r2, [r3, #48] 394:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 992 .loc 1 394 5 view .LVU256 993 0032 1A6B ldr r2, [r3, #48] 994 0034 02F00102 and r2, r2, #1 995 0038 0092 str r2, [sp] 394:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 996 .loc 1 394 5 view .LVU257 997 003a 009A ldr r2, [sp] 998 .LBE17: 394:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 999 .loc 1 394 5 view .LVU258 395:Core/Src/stm32f4xx_hal_msp.c **** /**TIM2 GPIO Configuration 1000 .loc 1 395 5 view .LVU259 1001 .LBB18: 395:Core/Src/stm32f4xx_hal_msp.c **** /**TIM2 GPIO Configuration 1002 .loc 1 395 5 view .LVU260 1003 003c 0194 str r4, [sp, #4] ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 29 395:Core/Src/stm32f4xx_hal_msp.c **** /**TIM2 GPIO Configuration 1004 .loc 1 395 5 view .LVU261 1005 003e 1A6B ldr r2, [r3, #48] 1006 0040 42F00202 orr r2, r2, #2 1007 0044 1A63 str r2, [r3, #48] 395:Core/Src/stm32f4xx_hal_msp.c **** /**TIM2 GPIO Configuration 1008 .loc 1 395 5 view .LVU262 1009 0046 1B6B ldr r3, [r3, #48] 1010 0048 03F00203 and r3, r3, #2 1011 004c 0193 str r3, [sp, #4] 395:Core/Src/stm32f4xx_hal_msp.c **** /**TIM2 GPIO Configuration 1012 .loc 1 395 5 view .LVU263 1013 004e 019B ldr r3, [sp, #4] 1014 .LBE18: 395:Core/Src/stm32f4xx_hal_msp.c **** /**TIM2 GPIO Configuration 1015 .loc 1 395 5 view .LVU264 400:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1016 .loc 1 400 5 view .LVU265 400:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1017 .loc 1 400 25 is_stmt 0 view .LVU266 1018 0050 2023 movs r3, #32 1019 0052 0393 str r3, [sp, #12] 401:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1020 .loc 1 401 5 is_stmt 1 view .LVU267 401:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1021 .loc 1 401 26 is_stmt 0 view .LVU268 1022 0054 0226 movs r6, #2 1023 0056 0496 str r6, [sp, #16] 402:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 1024 .loc 1 402 5 is_stmt 1 view .LVU269 403:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 1025 .loc 1 403 5 view .LVU270 404:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(MOTOR_L_PWM_GPIO_Port, &GPIO_InitStruct); 1026 .loc 1 404 5 view .LVU271 404:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(MOTOR_L_PWM_GPIO_Port, &GPIO_InitStruct); 1027 .loc 1 404 31 is_stmt 0 view .LVU272 1028 0058 0125 movs r5, #1 1029 005a 0795 str r5, [sp, #28] 405:Core/Src/stm32f4xx_hal_msp.c **** 1030 .loc 1 405 5 is_stmt 1 view .LVU273 1031 005c 03A9 add r1, sp, #12 1032 005e 1348 ldr r0, .L64+4 1033 .LVL47: 405:Core/Src/stm32f4xx_hal_msp.c **** 1034 .loc 1 405 5 is_stmt 0 view .LVU274 1035 0060 FFF7FEFF bl HAL_GPIO_Init 1036 .LVL48: 407:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1037 .loc 1 407 5 is_stmt 1 view .LVU275 407:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1038 .loc 1 407 25 is_stmt 0 view .LVU276 1039 0064 4FF40063 mov r3, #2048 1040 0068 0393 str r3, [sp, #12] 408:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1041 .loc 1 408 5 is_stmt 1 view .LVU277 408:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1042 .loc 1 408 26 is_stmt 0 view .LVU278 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 30 1043 006a 0496 str r6, [sp, #16] 409:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 1044 .loc 1 409 5 is_stmt 1 view .LVU279 409:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 1045 .loc 1 409 26 is_stmt 0 view .LVU280 1046 006c 0594 str r4, [sp, #20] 410:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 1047 .loc 1 410 5 is_stmt 1 view .LVU281 410:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 1048 .loc 1 410 27 is_stmt 0 view .LVU282 1049 006e 0694 str r4, [sp, #24] 411:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(MOTOR_R_PWM_GPIO_Port, &GPIO_InitStruct); 1050 .loc 1 411 5 is_stmt 1 view .LVU283 411:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(MOTOR_R_PWM_GPIO_Port, &GPIO_InitStruct); 1051 .loc 1 411 31 is_stmt 0 view .LVU284 1052 0070 0795 str r5, [sp, #28] 412:Core/Src/stm32f4xx_hal_msp.c **** 1053 .loc 1 412 5 is_stmt 1 view .LVU285 1054 0072 03A9 add r1, sp, #12 1055 0074 0E48 ldr r0, .L64+8 1056 0076 FFF7FEFF bl HAL_GPIO_Init 1057 .LVL49: 1058 007a D0E7 b .L58 1059 .LVL50: 1060 .L63: 424:Core/Src/stm32f4xx_hal_msp.c **** /**TIM3 GPIO Configuration 1061 .loc 1 424 5 view .LVU286 1062 .LBB19: 424:Core/Src/stm32f4xx_hal_msp.c **** /**TIM3 GPIO Configuration 1063 .loc 1 424 5 view .LVU287 1064 007c 0023 movs r3, #0 1065 007e 0293 str r3, [sp, #8] 424:Core/Src/stm32f4xx_hal_msp.c **** /**TIM3 GPIO Configuration 1066 .loc 1 424 5 view .LVU288 1067 0080 0C4B ldr r3, .L64+12 1068 0082 1A6B ldr r2, [r3, #48] 1069 0084 42F00202 orr r2, r2, #2 1070 0088 1A63 str r2, [r3, #48] 424:Core/Src/stm32f4xx_hal_msp.c **** /**TIM3 GPIO Configuration 1071 .loc 1 424 5 view .LVU289 1072 008a 1B6B ldr r3, [r3, #48] 1073 008c 03F00203 and r3, r3, #2 1074 0090 0293 str r3, [sp, #8] 424:Core/Src/stm32f4xx_hal_msp.c **** /**TIM3 GPIO Configuration 1075 .loc 1 424 5 view .LVU290 1076 0092 029B ldr r3, [sp, #8] 1077 .LBE19: 424:Core/Src/stm32f4xx_hal_msp.c **** /**TIM3 GPIO Configuration 1078 .loc 1 424 5 view .LVU291 429:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1079 .loc 1 429 5 view .LVU292 429:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1080 .loc 1 429 25 is_stmt 0 view .LVU293 1081 0094 3023 movs r3, #48 1082 0096 0393 str r3, [sp, #12] 430:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1083 .loc 1 430 5 is_stmt 1 view .LVU294 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 31 430:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1084 .loc 1 430 26 is_stmt 0 view .LVU295 1085 0098 0223 movs r3, #2 1086 009a 0493 str r3, [sp, #16] 431:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 1087 .loc 1 431 5 is_stmt 1 view .LVU296 432:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; 1088 .loc 1 432 5 view .LVU297 433:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 1089 .loc 1 433 5 view .LVU298 433:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 1090 .loc 1 433 31 is_stmt 0 view .LVU299 1091 009c 0793 str r3, [sp, #28] 434:Core/Src/stm32f4xx_hal_msp.c **** 1092 .loc 1 434 5 is_stmt 1 view .LVU300 1093 009e 03A9 add r1, sp, #12 1094 00a0 0348 ldr r0, .L64+8 1095 .LVL51: 434:Core/Src/stm32f4xx_hal_msp.c **** 1096 .loc 1 434 5 is_stmt 0 view .LVU301 1097 00a2 FFF7FEFF bl HAL_GPIO_Init 1098 .LVL52: 1099 .loc 1 441 1 view .LVU302 1100 00a6 BAE7 b .L58 1101 .L65: 1102 .align 2 1103 .L64: 1104 00a8 00040040 .word 1073742848 1105 00ac 00000240 .word 1073872896 1106 00b0 00040240 .word 1073873920 1107 00b4 00380240 .word 1073887232 1108 .cfi_endproc 1109 .LFE247: 1111 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits 1112 .align 1 1113 .global HAL_TIM_Base_MspDeInit 1114 .syntax unified 1115 .thumb 1116 .thumb_func 1118 HAL_TIM_Base_MspDeInit: 1119 .LVL53: 1120 .LFB248: 442:Core/Src/stm32f4xx_hal_msp.c **** /** 443:Core/Src/stm32f4xx_hal_msp.c **** * @brief TIM_Base MSP De-Initialization 444:Core/Src/stm32f4xx_hal_msp.c **** * This function freeze the hardware resources used in this example 445:Core/Src/stm32f4xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer 446:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 447:Core/Src/stm32f4xx_hal_msp.c **** */ 448:Core/Src/stm32f4xx_hal_msp.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) 449:Core/Src/stm32f4xx_hal_msp.c **** { 1121 .loc 1 449 1 is_stmt 1 view -0 1122 .cfi_startproc 1123 @ args = 0, pretend = 0, frame = 0 1124 @ frame_needed = 0, uses_anonymous_args = 0 1125 .loc 1 449 1 is_stmt 0 view .LVU304 1126 0000 08B5 push {r3, lr} 1127 .LCFI28: ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 32 1128 .cfi_def_cfa_offset 8 1129 .cfi_offset 3, -8 1130 .cfi_offset 14, -4 450:Core/Src/stm32f4xx_hal_msp.c **** if(htim_base->Instance==TIM1) 1131 .loc 1 450 3 is_stmt 1 view .LVU305 1132 .loc 1 450 15 is_stmt 0 view .LVU306 1133 0002 0368 ldr r3, [r0] 1134 .loc 1 450 5 view .LVU307 1135 0004 164A ldr r2, .L76 1136 0006 9342 cmp r3, r2 1137 0008 09D0 beq .L72 451:Core/Src/stm32f4xx_hal_msp.c **** { 452:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspDeInit 0 */ 453:Core/Src/stm32f4xx_hal_msp.c **** 454:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM1_MspDeInit 0 */ 455:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock disable */ 456:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_TIM1_CLK_DISABLE(); 457:Core/Src/stm32f4xx_hal_msp.c **** 458:Core/Src/stm32f4xx_hal_msp.c **** /* TIM1 interrupt DeInit */ 459:Core/Src/stm32f4xx_hal_msp.c **** HAL_NVIC_DisableIRQ(TIM1_BRK_TIM9_IRQn); 460:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspDeInit 1 */ 461:Core/Src/stm32f4xx_hal_msp.c **** 462:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM1_MspDeInit 1 */ 463:Core/Src/stm32f4xx_hal_msp.c **** } 464:Core/Src/stm32f4xx_hal_msp.c **** else if(htim_base->Instance==TIM2) 1138 .loc 1 464 8 is_stmt 1 view .LVU308 1139 .loc 1 464 10 is_stmt 0 view .LVU309 1140 000a B3F1804F cmp r3, #1073741824 1141 000e 10D0 beq .L73 465:Core/Src/stm32f4xx_hal_msp.c **** { 466:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 0 */ 467:Core/Src/stm32f4xx_hal_msp.c **** 468:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM2_MspDeInit 0 */ 469:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock disable */ 470:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_TIM2_CLK_DISABLE(); 471:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */ 472:Core/Src/stm32f4xx_hal_msp.c **** 473:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM2_MspDeInit 1 */ 474:Core/Src/stm32f4xx_hal_msp.c **** } 475:Core/Src/stm32f4xx_hal_msp.c **** else if(htim_base->Instance==TIM3) 1142 .loc 1 475 8 is_stmt 1 view .LVU310 1143 .loc 1 475 10 is_stmt 0 view .LVU311 1144 0010 144A ldr r2, .L76+4 1145 0012 9342 cmp r3, r2 1146 0014 13D0 beq .L74 476:Core/Src/stm32f4xx_hal_msp.c **** { 477:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 0 */ 478:Core/Src/stm32f4xx_hal_msp.c **** 479:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM3_MspDeInit 0 */ 480:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock disable */ 481:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_TIM3_CLK_DISABLE(); 482:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */ 483:Core/Src/stm32f4xx_hal_msp.c **** 484:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM3_MspDeInit 1 */ 485:Core/Src/stm32f4xx_hal_msp.c **** } 486:Core/Src/stm32f4xx_hal_msp.c **** else if(htim_base->Instance==TIM5) 1147 .loc 1 486 8 is_stmt 1 view .LVU312 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 33 1148 .loc 1 486 10 is_stmt 0 view .LVU313 1149 0016 144A ldr r2, .L76+8 1150 0018 9342 cmp r3, r2 1151 001a 17D0 beq .L75 1152 .LVL54: 1153 .L66: 487:Core/Src/stm32f4xx_hal_msp.c **** { 488:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM5_MspDeInit 0 */ 489:Core/Src/stm32f4xx_hal_msp.c **** 490:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM5_MspDeInit 0 */ 491:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock disable */ 492:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_TIM5_CLK_DISABLE(); 493:Core/Src/stm32f4xx_hal_msp.c **** 494:Core/Src/stm32f4xx_hal_msp.c **** /* TIM5 interrupt DeInit */ 495:Core/Src/stm32f4xx_hal_msp.c **** HAL_NVIC_DisableIRQ(TIM5_IRQn); 496:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM5_MspDeInit 1 */ 497:Core/Src/stm32f4xx_hal_msp.c **** 498:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM5_MspDeInit 1 */ 499:Core/Src/stm32f4xx_hal_msp.c **** } 500:Core/Src/stm32f4xx_hal_msp.c **** 501:Core/Src/stm32f4xx_hal_msp.c **** } 1154 .loc 1 501 1 view .LVU314 1155 001c 08BD pop {r3, pc} 1156 .LVL55: 1157 .L72: 456:Core/Src/stm32f4xx_hal_msp.c **** 1158 .loc 1 456 5 is_stmt 1 view .LVU315 1159 001e 02F59C32 add r2, r2, #79872 1160 0022 536C ldr r3, [r2, #68] 1161 0024 23F00103 bic r3, r3, #1 1162 0028 5364 str r3, [r2, #68] 459:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspDeInit 1 */ 1163 .loc 1 459 5 view .LVU316 1164 002a 1820 movs r0, #24 1165 .LVL56: 459:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspDeInit 1 */ 1166 .loc 1 459 5 is_stmt 0 view .LVU317 1167 002c FFF7FEFF bl HAL_NVIC_DisableIRQ 1168 .LVL57: 1169 0030 F4E7 b .L66 1170 .LVL58: 1171 .L73: 470:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */ 1172 .loc 1 470 5 is_stmt 1 view .LVU318 1173 0032 0E4A ldr r2, .L76+12 1174 0034 136C ldr r3, [r2, #64] 1175 0036 23F00103 bic r3, r3, #1 1176 003a 1364 str r3, [r2, #64] 1177 003c EEE7 b .L66 1178 .L74: 481:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */ 1179 .loc 1 481 5 view .LVU319 1180 003e 02F50D32 add r2, r2, #144384 1181 0042 136C ldr r3, [r2, #64] 1182 0044 23F00203 bic r3, r3, #2 1183 0048 1364 str r3, [r2, #64] 1184 004a E7E7 b .L66 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 34 1185 .L75: 492:Core/Src/stm32f4xx_hal_msp.c **** 1186 .loc 1 492 5 view .LVU320 1187 004c 02F50B32 add r2, r2, #142336 1188 0050 136C ldr r3, [r2, #64] 1189 0052 23F00803 bic r3, r3, #8 1190 0056 1364 str r3, [r2, #64] 495:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM5_MspDeInit 1 */ 1191 .loc 1 495 5 view .LVU321 1192 0058 3220 movs r0, #50 1193 .LVL59: 495:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM5_MspDeInit 1 */ 1194 .loc 1 495 5 is_stmt 0 view .LVU322 1195 005a FFF7FEFF bl HAL_NVIC_DisableIRQ 1196 .LVL60: 1197 .loc 1 501 1 view .LVU323 1198 005e DDE7 b .L66 1199 .L77: 1200 .align 2 1201 .L76: 1202 0060 00000140 .word 1073807360 1203 0064 00040040 .word 1073742848 1204 0068 000C0040 .word 1073744896 1205 006c 00380240 .word 1073887232 1206 .cfi_endproc 1207 .LFE248: 1209 .section .text.HAL_TIM_OC_MspDeInit,"ax",%progbits 1210 .align 1 1211 .global HAL_TIM_OC_MspDeInit 1212 .syntax unified 1213 .thumb 1214 .thumb_func 1216 HAL_TIM_OC_MspDeInit: 1217 .LVL61: 1218 .LFB249: 502:Core/Src/stm32f4xx_hal_msp.c **** 503:Core/Src/stm32f4xx_hal_msp.c **** /** 504:Core/Src/stm32f4xx_hal_msp.c **** * @brief TIM_OC MSP De-Initialization 505:Core/Src/stm32f4xx_hal_msp.c **** * This function freeze the hardware resources used in this example 506:Core/Src/stm32f4xx_hal_msp.c **** * @param htim_oc: TIM_OC handle pointer 507:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 508:Core/Src/stm32f4xx_hal_msp.c **** */ 509:Core/Src/stm32f4xx_hal_msp.c **** void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef* htim_oc) 510:Core/Src/stm32f4xx_hal_msp.c **** { 1219 .loc 1 510 1 is_stmt 1 view -0 1220 .cfi_startproc 1221 @ args = 0, pretend = 0, frame = 0 1222 @ frame_needed = 0, uses_anonymous_args = 0 1223 .loc 1 510 1 is_stmt 0 view .LVU325 1224 0000 08B5 push {r3, lr} 1225 .LCFI29: 1226 .cfi_def_cfa_offset 8 1227 .cfi_offset 3, -8 1228 .cfi_offset 14, -4 511:Core/Src/stm32f4xx_hal_msp.c **** if(htim_oc->Instance==TIM4) 1229 .loc 1 511 3 is_stmt 1 view .LVU326 1230 .loc 1 511 13 is_stmt 0 view .LVU327 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 35 1231 0002 0268 ldr r2, [r0] 1232 .loc 1 511 5 view .LVU328 1233 0004 064B ldr r3, .L82 1234 0006 9A42 cmp r2, r3 1235 0008 00D0 beq .L81 1236 .LVL62: 1237 .L78: 512:Core/Src/stm32f4xx_hal_msp.c **** { 513:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspDeInit 0 */ 514:Core/Src/stm32f4xx_hal_msp.c **** 515:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM4_MspDeInit 0 */ 516:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock disable */ 517:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_TIM4_CLK_DISABLE(); 518:Core/Src/stm32f4xx_hal_msp.c **** 519:Core/Src/stm32f4xx_hal_msp.c **** /**TIM4 GPIO Configuration 520:Core/Src/stm32f4xx_hal_msp.c **** PB6 ------> TIM4_CH1 521:Core/Src/stm32f4xx_hal_msp.c **** PB7 ------> TIM4_CH2 522:Core/Src/stm32f4xx_hal_msp.c **** */ 523:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, EC_L_A_Pin|EC_L_B_Pin); 524:Core/Src/stm32f4xx_hal_msp.c **** 525:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspDeInit 1 */ 526:Core/Src/stm32f4xx_hal_msp.c **** 527:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM4_MspDeInit 1 */ 528:Core/Src/stm32f4xx_hal_msp.c **** } 529:Core/Src/stm32f4xx_hal_msp.c **** 530:Core/Src/stm32f4xx_hal_msp.c **** } 1238 .loc 1 530 1 view .LVU329 1239 000a 08BD pop {r3, pc} 1240 .LVL63: 1241 .L81: 517:Core/Src/stm32f4xx_hal_msp.c **** 1242 .loc 1 517 5 is_stmt 1 view .LVU330 1243 000c 054A ldr r2, .L82+4 1244 000e 136C ldr r3, [r2, #64] 1245 0010 23F00403 bic r3, r3, #4 1246 0014 1364 str r3, [r2, #64] 523:Core/Src/stm32f4xx_hal_msp.c **** 1247 .loc 1 523 5 view .LVU331 1248 0016 C021 movs r1, #192 1249 0018 0348 ldr r0, .L82+8 1250 .LVL64: 523:Core/Src/stm32f4xx_hal_msp.c **** 1251 .loc 1 523 5 is_stmt 0 view .LVU332 1252 001a FFF7FEFF bl HAL_GPIO_DeInit 1253 .LVL65: 1254 .loc 1 530 1 view .LVU333 1255 001e F4E7 b .L78 1256 .L83: 1257 .align 2 1258 .L82: 1259 0020 00080040 .word 1073743872 1260 0024 00380240 .word 1073887232 1261 0028 00040240 .word 1073873920 1262 .cfi_endproc 1263 .LFE249: 1265 .section .text.HAL_TIM_Encoder_MspDeInit,"ax",%progbits 1266 .align 1 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 36 1267 .global HAL_TIM_Encoder_MspDeInit 1268 .syntax unified 1269 .thumb 1270 .thumb_func 1272 HAL_TIM_Encoder_MspDeInit: 1273 .LVL66: 1274 .LFB250: 531:Core/Src/stm32f4xx_hal_msp.c **** 532:Core/Src/stm32f4xx_hal_msp.c **** /** 533:Core/Src/stm32f4xx_hal_msp.c **** * @brief TIM_Encoder MSP De-Initialization 534:Core/Src/stm32f4xx_hal_msp.c **** * This function freeze the hardware resources used in this example 535:Core/Src/stm32f4xx_hal_msp.c **** * @param htim_encoder: TIM_Encoder handle pointer 536:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 537:Core/Src/stm32f4xx_hal_msp.c **** */ 538:Core/Src/stm32f4xx_hal_msp.c **** void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef* htim_encoder) 539:Core/Src/stm32f4xx_hal_msp.c **** { 1275 .loc 1 539 1 is_stmt 1 view -0 1276 .cfi_startproc 1277 @ args = 0, pretend = 0, frame = 0 1278 @ frame_needed = 0, uses_anonymous_args = 0 1279 .loc 1 539 1 is_stmt 0 view .LVU335 1280 0000 08B5 push {r3, lr} 1281 .LCFI30: 1282 .cfi_def_cfa_offset 8 1283 .cfi_offset 3, -8 1284 .cfi_offset 14, -4 540:Core/Src/stm32f4xx_hal_msp.c **** if(htim_encoder->Instance==TIM8) 1285 .loc 1 540 3 is_stmt 1 view .LVU336 1286 .loc 1 540 18 is_stmt 0 view .LVU337 1287 0002 0268 ldr r2, [r0] 1288 .loc 1 540 5 view .LVU338 1289 0004 064B ldr r3, .L88 1290 0006 9A42 cmp r2, r3 1291 0008 00D0 beq .L87 1292 .LVL67: 1293 .L84: 541:Core/Src/stm32f4xx_hal_msp.c **** { 542:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 0 */ 543:Core/Src/stm32f4xx_hal_msp.c **** 544:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM8_MspDeInit 0 */ 545:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock disable */ 546:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_TIM8_CLK_DISABLE(); 547:Core/Src/stm32f4xx_hal_msp.c **** 548:Core/Src/stm32f4xx_hal_msp.c **** /**TIM8 GPIO Configuration 549:Core/Src/stm32f4xx_hal_msp.c **** PC6 ------> TIM8_CH1 550:Core/Src/stm32f4xx_hal_msp.c **** PC7 ------> TIM8_CH2 551:Core/Src/stm32f4xx_hal_msp.c **** */ 552:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, EC_R_A_Pin|EC_R_B_Pin); 553:Core/Src/stm32f4xx_hal_msp.c **** 554:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 1 */ 555:Core/Src/stm32f4xx_hal_msp.c **** 556:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TIM8_MspDeInit 1 */ 557:Core/Src/stm32f4xx_hal_msp.c **** } 558:Core/Src/stm32f4xx_hal_msp.c **** 559:Core/Src/stm32f4xx_hal_msp.c **** } 1294 .loc 1 559 1 view .LVU339 1295 000a 08BD pop {r3, pc} ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 37 1296 .LVL68: 1297 .L87: 546:Core/Src/stm32f4xx_hal_msp.c **** 1298 .loc 1 546 5 is_stmt 1 view .LVU340 1299 000c 054A ldr r2, .L88+4 1300 000e 536C ldr r3, [r2, #68] 1301 0010 23F00203 bic r3, r3, #2 1302 0014 5364 str r3, [r2, #68] 552:Core/Src/stm32f4xx_hal_msp.c **** 1303 .loc 1 552 5 view .LVU341 1304 0016 C021 movs r1, #192 1305 0018 0348 ldr r0, .L88+8 1306 .LVL69: 552:Core/Src/stm32f4xx_hal_msp.c **** 1307 .loc 1 552 5 is_stmt 0 view .LVU342 1308 001a FFF7FEFF bl HAL_GPIO_DeInit 1309 .LVL70: 1310 .loc 1 559 1 view .LVU343 1311 001e F4E7 b .L84 1312 .L89: 1313 .align 2 1314 .L88: 1315 0020 00040140 .word 1073808384 1316 0024 00380240 .word 1073887232 1317 0028 00080240 .word 1073874944 1318 .cfi_endproc 1319 .LFE250: 1321 .section .text.HAL_UART_MspInit,"ax",%progbits 1322 .align 1 1323 .global HAL_UART_MspInit 1324 .syntax unified 1325 .thumb 1326 .thumb_func 1328 HAL_UART_MspInit: 1329 .LVL71: 1330 .LFB251: 560:Core/Src/stm32f4xx_hal_msp.c **** 561:Core/Src/stm32f4xx_hal_msp.c **** /** 562:Core/Src/stm32f4xx_hal_msp.c **** * @brief UART MSP Initialization 563:Core/Src/stm32f4xx_hal_msp.c **** * This function configures the hardware resources used in this example 564:Core/Src/stm32f4xx_hal_msp.c **** * @param huart: UART handle pointer 565:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 566:Core/Src/stm32f4xx_hal_msp.c **** */ 567:Core/Src/stm32f4xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart) 568:Core/Src/stm32f4xx_hal_msp.c **** { 1331 .loc 1 568 1 is_stmt 1 view -0 1332 .cfi_startproc 1333 @ args = 0, pretend = 0, frame = 32 1334 @ frame_needed = 0, uses_anonymous_args = 0 1335 .loc 1 568 1 is_stmt 0 view .LVU345 1336 0000 00B5 push {lr} 1337 .LCFI31: 1338 .cfi_def_cfa_offset 4 1339 .cfi_offset 14, -4 1340 0002 89B0 sub sp, sp, #36 1341 .LCFI32: 1342 .cfi_def_cfa_offset 40 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 38 569:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 1343 .loc 1 569 3 is_stmt 1 view .LVU346 1344 .loc 1 569 20 is_stmt 0 view .LVU347 1345 0004 0023 movs r3, #0 1346 0006 0393 str r3, [sp, #12] 1347 0008 0493 str r3, [sp, #16] 1348 000a 0593 str r3, [sp, #20] 1349 000c 0693 str r3, [sp, #24] 1350 000e 0793 str r3, [sp, #28] 570:Core/Src/stm32f4xx_hal_msp.c **** if(huart->Instance==USART1) 1351 .loc 1 570 3 is_stmt 1 view .LVU348 1352 .loc 1 570 11 is_stmt 0 view .LVU349 1353 0010 0268 ldr r2, [r0] 1354 .loc 1 570 5 view .LVU350 1355 0012 03F18043 add r3, r3, #1073741824 1356 0016 03F58833 add r3, r3, #69632 1357 001a 9A42 cmp r2, r3 1358 001c 02D0 beq .L93 1359 .LVL72: 1360 .L90: 571:Core/Src/stm32f4xx_hal_msp.c **** { 572:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 0 */ 573:Core/Src/stm32f4xx_hal_msp.c **** 574:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END USART1_MspInit 0 */ 575:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock enable */ 576:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_USART1_CLK_ENABLE(); 577:Core/Src/stm32f4xx_hal_msp.c **** 578:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 579:Core/Src/stm32f4xx_hal_msp.c **** /**USART1 GPIO Configuration 580:Core/Src/stm32f4xx_hal_msp.c **** PA9 ------> USART1_TX 581:Core/Src/stm32f4xx_hal_msp.c **** PA10 ------> USART1_RX 582:Core/Src/stm32f4xx_hal_msp.c **** */ 583:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pin = PC_RX_Pin|PC_TX_Pin; 584:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 585:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 586:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 587:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 588:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 589:Core/Src/stm32f4xx_hal_msp.c **** 590:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 1 */ 591:Core/Src/stm32f4xx_hal_msp.c **** 592:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END USART1_MspInit 1 */ 593:Core/Src/stm32f4xx_hal_msp.c **** 594:Core/Src/stm32f4xx_hal_msp.c **** } 595:Core/Src/stm32f4xx_hal_msp.c **** 596:Core/Src/stm32f4xx_hal_msp.c **** } 1361 .loc 1 596 1 view .LVU351 1362 001e 09B0 add sp, sp, #36 1363 .LCFI33: 1364 .cfi_remember_state 1365 .cfi_def_cfa_offset 4 1366 @ sp needed 1367 0020 5DF804FB ldr pc, [sp], #4 1368 .LVL73: 1369 .L93: 1370 .LCFI34: 1371 .cfi_restore_state ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 39 576:Core/Src/stm32f4xx_hal_msp.c **** 1372 .loc 1 576 5 is_stmt 1 view .LVU352 1373 .LBB20: 576:Core/Src/stm32f4xx_hal_msp.c **** 1374 .loc 1 576 5 view .LVU353 1375 0024 0021 movs r1, #0 1376 0026 0191 str r1, [sp, #4] 576:Core/Src/stm32f4xx_hal_msp.c **** 1377 .loc 1 576 5 view .LVU354 1378 0028 03F59433 add r3, r3, #75776 1379 002c 5A6C ldr r2, [r3, #68] 1380 002e 42F01002 orr r2, r2, #16 1381 0032 5A64 str r2, [r3, #68] 576:Core/Src/stm32f4xx_hal_msp.c **** 1382 .loc 1 576 5 view .LVU355 1383 0034 5A6C ldr r2, [r3, #68] 1384 0036 02F01002 and r2, r2, #16 1385 003a 0192 str r2, [sp, #4] 576:Core/Src/stm32f4xx_hal_msp.c **** 1386 .loc 1 576 5 view .LVU356 1387 003c 019A ldr r2, [sp, #4] 1388 .LBE20: 576:Core/Src/stm32f4xx_hal_msp.c **** 1389 .loc 1 576 5 view .LVU357 578:Core/Src/stm32f4xx_hal_msp.c **** /**USART1 GPIO Configuration 1390 .loc 1 578 5 view .LVU358 1391 .LBB21: 578:Core/Src/stm32f4xx_hal_msp.c **** /**USART1 GPIO Configuration 1392 .loc 1 578 5 view .LVU359 1393 003e 0291 str r1, [sp, #8] 578:Core/Src/stm32f4xx_hal_msp.c **** /**USART1 GPIO Configuration 1394 .loc 1 578 5 view .LVU360 1395 0040 1A6B ldr r2, [r3, #48] 1396 0042 42F00102 orr r2, r2, #1 1397 0046 1A63 str r2, [r3, #48] 578:Core/Src/stm32f4xx_hal_msp.c **** /**USART1 GPIO Configuration 1398 .loc 1 578 5 view .LVU361 1399 0048 1B6B ldr r3, [r3, #48] 1400 004a 03F00103 and r3, r3, #1 1401 004e 0293 str r3, [sp, #8] 578:Core/Src/stm32f4xx_hal_msp.c **** /**USART1 GPIO Configuration 1402 .loc 1 578 5 view .LVU362 1403 0050 029B ldr r3, [sp, #8] 1404 .LBE21: 578:Core/Src/stm32f4xx_hal_msp.c **** /**USART1 GPIO Configuration 1405 .loc 1 578 5 view .LVU363 583:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1406 .loc 1 583 5 view .LVU364 583:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1407 .loc 1 583 25 is_stmt 0 view .LVU365 1408 0052 4FF4C063 mov r3, #1536 1409 0056 0393 str r3, [sp, #12] 584:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1410 .loc 1 584 5 is_stmt 1 view .LVU366 584:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1411 .loc 1 584 26 is_stmt 0 view .LVU367 1412 0058 0223 movs r3, #2 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 40 1413 005a 0493 str r3, [sp, #16] 585:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 1414 .loc 1 585 5 is_stmt 1 view .LVU368 586:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 1415 .loc 1 586 5 view .LVU369 586:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 1416 .loc 1 586 27 is_stmt 0 view .LVU370 1417 005c 0323 movs r3, #3 1418 005e 0693 str r3, [sp, #24] 587:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 1419 .loc 1 587 5 is_stmt 1 view .LVU371 587:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 1420 .loc 1 587 31 is_stmt 0 view .LVU372 1421 0060 0723 movs r3, #7 1422 0062 0793 str r3, [sp, #28] 588:Core/Src/stm32f4xx_hal_msp.c **** 1423 .loc 1 588 5 is_stmt 1 view .LVU373 1424 0064 03A9 add r1, sp, #12 1425 0066 0248 ldr r0, .L94 1426 .LVL74: 588:Core/Src/stm32f4xx_hal_msp.c **** 1427 .loc 1 588 5 is_stmt 0 view .LVU374 1428 0068 FFF7FEFF bl HAL_GPIO_Init 1429 .LVL75: 1430 .loc 1 596 1 view .LVU375 1431 006c D7E7 b .L90 1432 .L95: 1433 006e 00BF .align 2 1434 .L94: 1435 0070 00000240 .word 1073872896 1436 .cfi_endproc 1437 .LFE251: 1439 .section .text.HAL_UART_MspDeInit,"ax",%progbits 1440 .align 1 1441 .global HAL_UART_MspDeInit 1442 .syntax unified 1443 .thumb 1444 .thumb_func 1446 HAL_UART_MspDeInit: 1447 .LVL76: 1448 .LFB252: 597:Core/Src/stm32f4xx_hal_msp.c **** 598:Core/Src/stm32f4xx_hal_msp.c **** /** 599:Core/Src/stm32f4xx_hal_msp.c **** * @brief UART MSP De-Initialization 600:Core/Src/stm32f4xx_hal_msp.c **** * This function freeze the hardware resources used in this example 601:Core/Src/stm32f4xx_hal_msp.c **** * @param huart: UART handle pointer 602:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 603:Core/Src/stm32f4xx_hal_msp.c **** */ 604:Core/Src/stm32f4xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) 605:Core/Src/stm32f4xx_hal_msp.c **** { 1449 .loc 1 605 1 is_stmt 1 view -0 1450 .cfi_startproc 1451 @ args = 0, pretend = 0, frame = 0 1452 @ frame_needed = 0, uses_anonymous_args = 0 1453 .loc 1 605 1 is_stmt 0 view .LVU377 1454 0000 08B5 push {r3, lr} 1455 .LCFI35: ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 41 1456 .cfi_def_cfa_offset 8 1457 .cfi_offset 3, -8 1458 .cfi_offset 14, -4 606:Core/Src/stm32f4xx_hal_msp.c **** if(huart->Instance==USART1) 1459 .loc 1 606 3 is_stmt 1 view .LVU378 1460 .loc 1 606 11 is_stmt 0 view .LVU379 1461 0002 0268 ldr r2, [r0] 1462 .loc 1 606 5 view .LVU380 1463 0004 074B ldr r3, .L100 1464 0006 9A42 cmp r2, r3 1465 0008 00D0 beq .L99 1466 .LVL77: 1467 .L96: 607:Core/Src/stm32f4xx_hal_msp.c **** { 608:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 0 */ 609:Core/Src/stm32f4xx_hal_msp.c **** 610:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 0 */ 611:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock disable */ 612:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_USART1_CLK_DISABLE(); 613:Core/Src/stm32f4xx_hal_msp.c **** 614:Core/Src/stm32f4xx_hal_msp.c **** /**USART1 GPIO Configuration 615:Core/Src/stm32f4xx_hal_msp.c **** PA9 ------> USART1_TX 616:Core/Src/stm32f4xx_hal_msp.c **** PA10 ------> USART1_RX 617:Core/Src/stm32f4xx_hal_msp.c **** */ 618:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, PC_RX_Pin|PC_TX_Pin); 619:Core/Src/stm32f4xx_hal_msp.c **** 620:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 1 */ 621:Core/Src/stm32f4xx_hal_msp.c **** 622:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 1 */ 623:Core/Src/stm32f4xx_hal_msp.c **** } 624:Core/Src/stm32f4xx_hal_msp.c **** 625:Core/Src/stm32f4xx_hal_msp.c **** } 1468 .loc 1 625 1 view .LVU381 1469 000a 08BD pop {r3, pc} 1470 .LVL78: 1471 .L99: 612:Core/Src/stm32f4xx_hal_msp.c **** 1472 .loc 1 612 5 is_stmt 1 view .LVU382 1473 000c 064A ldr r2, .L100+4 1474 000e 536C ldr r3, [r2, #68] 1475 0010 23F01003 bic r3, r3, #16 1476 0014 5364 str r3, [r2, #68] 618:Core/Src/stm32f4xx_hal_msp.c **** 1477 .loc 1 618 5 view .LVU383 1478 0016 4FF4C061 mov r1, #1536 1479 001a 0448 ldr r0, .L100+8 1480 .LVL79: 618:Core/Src/stm32f4xx_hal_msp.c **** 1481 .loc 1 618 5 is_stmt 0 view .LVU384 1482 001c FFF7FEFF bl HAL_GPIO_DeInit 1483 .LVL80: 1484 .loc 1 625 1 view .LVU385 1485 0020 F3E7 b .L96 1486 .L101: 1487 0022 00BF .align 2 1488 .L100: 1489 0024 00100140 .word 1073811456 ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 42 1490 0028 00380240 .word 1073887232 1491 002c 00000240 .word 1073872896 1492 .cfi_endproc 1493 .LFE252: 1495 .text 1496 .Letext0: 1497 .file 2 "c:\\tools\\gcc-arm-none-eabi-10.3-2021.10-win32\\gcc-arm-none-eabi-10.3-2021.10\\arm-none 1498 .file 3 "c:\\tools\\gcc-arm-none-eabi-10.3-2021.10-win32\\gcc-arm-none-eabi-10.3-2021.10\\arm-none 1499 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f405xx.h" 1500 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" 1501 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" 1502 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" 1503 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" 1504 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h" 1505 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h" 1506 .file 11 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h" 1507 .file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h" 1508 .file 13 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h" 1509 .file 14 "Core/Inc/main.h" ARM GAS C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s page 43 DEFINED SYMBOLS *ABS*:00000000 stm32f4xx_hal_msp.c C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:20 .text.HAL_MspInit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:26 .text.HAL_MspInit:00000000 HAL_MspInit C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:80 .text.HAL_MspInit:00000034 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:85 .text.HAL_ADC_MspInit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:91 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:281 .text.HAL_ADC_MspInit:000000c4 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:289 .text.HAL_ADC_MspDeInit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:295 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:346 .text.HAL_ADC_MspDeInit:00000030 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:354 .text.HAL_SPI_MspInit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:360 .text.HAL_SPI_MspInit:00000000 HAL_SPI_MspInit C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:466 .text.HAL_SPI_MspInit:00000068 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:472 .text.HAL_SPI_MspDeInit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:478 .text.HAL_SPI_MspDeInit:00000000 HAL_SPI_MspDeInit C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:521 .text.HAL_SPI_MspDeInit:00000024 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:528 .text.HAL_TIM_Base_MspInit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:534 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:689 .text.HAL_TIM_Base_MspInit:000000a8 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:697 .text.HAL_TIM_OC_MspInit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:703 .text.HAL_TIM_OC_MspInit:00000000 HAL_TIM_OC_MspInit C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:805 .text.HAL_TIM_OC_MspInit:00000060 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:811 .text.HAL_TIM_Encoder_MspInit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:817 .text.HAL_TIM_Encoder_MspInit:00000000 HAL_TIM_Encoder_MspInit C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:921 .text.HAL_TIM_Encoder_MspInit:00000068 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:926 .text.HAL_TIM_MspPostInit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:932 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1104 .text.HAL_TIM_MspPostInit:000000a8 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1112 .text.HAL_TIM_Base_MspDeInit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1118 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1202 .text.HAL_TIM_Base_MspDeInit:00000060 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1210 .text.HAL_TIM_OC_MspDeInit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1216 .text.HAL_TIM_OC_MspDeInit:00000000 HAL_TIM_OC_MspDeInit C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1259 .text.HAL_TIM_OC_MspDeInit:00000020 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1266 .text.HAL_TIM_Encoder_MspDeInit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1272 .text.HAL_TIM_Encoder_MspDeInit:00000000 HAL_TIM_Encoder_MspDeInit C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1315 .text.HAL_TIM_Encoder_MspDeInit:00000020 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1322 .text.HAL_UART_MspInit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1328 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1435 .text.HAL_UART_MspInit:00000070 $d C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1440 .text.HAL_UART_MspDeInit:00000000 $t C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1446 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit C:\Users\MHONDA~1\AppData\Local\Temp\ccg4pOZJ.s:1489 .text.HAL_UART_MspDeInit:00000024 $d UNDEFINED SYMBOLS HAL_GPIO_Init HAL_DMA_Init Error_Handler hdma_adc1 HAL_GPIO_DeInit HAL_DMA_DeInit HAL_NVIC_SetPriority HAL_NVIC_EnableIRQ HAL_NVIC_DisableIRQ