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hardware / marzipan / marzipan.kicad_pcb
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hardware / operacake / operacake.kicad_pcb
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hardware / operacake / operacake.sch
Last update 2 years 1 month
by
Gianpaolo Macario
w25q80bv_target.c/* * Copyright 2014-2022 Great Scott Gadgets <info@greatscottgadgets.com> * Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc. * * This file is part of HackRF. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2, or (at your option) * any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; see the file COPYING. If not, write to * the Free Software Foundation, Inc., 51 Franklin Street, * Boston, MA 02110-1301, USA. */ #include "w25q80bv_target.h" #include <libopencm3/lpc43xx/scu.h> #include "hackrf_core.h" /* TODO: Why is CS being controlled manually when SSP0 could do it * automatically? */ void w25q80bv_target_init(w25q80bv_driver_t* const drv) { (void) drv; /* Init SPIFI GPIO to Normal GPIO */ // P3_3 SPIFI_SCK => SSP0_SCK scu_pinmux(P3_3, (SCU_SSP_IO | SCU_CONF_FUNCTION2)); // P3_4 SPIFI SPIFI_SIO3 IO3 => GPIO1[14] scu_pinmux(P3_4, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_5 SPIFI SPIFI_SIO2 IO2 => GPIO1[15] scu_pinmux(P3_5, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_6 SPIFI SPIFI_CIPO IO1 => GPIO0[6] scu_pinmux(P3_6, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_7 SPIFI SPIFI_COPI IO0 => GPIO5[10] scu_pinmux(P3_7, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_8 SPIFI SPIFI_CS => GPIO5[11] scu_pinmux(P3_8, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); /* configure SSP pins */ scu_pinmux(SCU_SSP0_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); scu_pinmux(SCU_SSP0_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); scu_pinmux(SCU_SSP0_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION2)); /* configure GPIO pins */ scu_pinmux(SCU_FLASH_HOLD, SCU_GPIO_FAST); scu_pinmux(SCU_FLASH_WP, SCU_GPIO_FAST); scu_pinmux(SCU_SSP0_CS, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); /* drive CS, HOLD, and WP pins high */ gpio_set(drv->gpio_hold); gpio_set(drv->gpio_wp); /* Set GPIO pins as outputs. */ gpio_output(drv->gpio_hold); gpio_output(drv->gpio_wp); }