revC2: Clean up silkscreen & ADC routing

revC2: Clean up VSENSE routing

revC2: Fix ESD protection footprint & clean up routing

revC2: add rc filter for Vsense input The capacitor is currently DNP as it is currently unknown if the filter is necessary. The resistor is the lowest value in the BOM (4r7).

revC2: fix drc issues at the lvds connector with chamfered pads The chamfered pads are made using custom shape primitives using only features from Kicad 5.1

revC2: Consolidated sub 1k resistor value notation.

revC2: Addressed some DRC issues. Addressed: * Decreased via size under the BGA. 0.2mm drill 0.4mm pad, this increases the clearance to the pads and is still a reasonable requirement for most PCB houses. (PCB houses can adjust these if necessary in most cases) * Decreased via size under the ESD diode packs. Disabled: * Disabled courtyard checking, this is a guidance in the first place, also we violate it in so many places that the DRC errors drown in the noise. It is still good practice to respect courtyards when possible. Not resolved: * Pad to drill distance for the LVDS connector. To resolve it we can either use complex pads or use the new single corner chamfered pads in KiCad nightly. To save time I leave this issue for the very last step of gerber generation that can be done in KiCad nightly.

revC2: Updated 1b2-bom-keys and corrected levelshifter PN.

revC2: Increased tact switch slot width. Now the slot width is the same 0.6mm as the USB-C connector which is known to work even with JLCPCB. JLCPCB officially states that the slot width should be 0.65mm, though we know they are fine with the narrower USB-C slot too.

revC2: Corrected the reset button 3d model.