Files
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PCB / ACC / CIAA_ACC / BANK_0.sch
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PCB / ACC / CIAA_ACC / BANK_112.sch
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PCB / ACC / CIAA_ACC / BANK_500.sch
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PCB / ACC / CIAA_ACC / BANK_501.sch
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PCB / ACC / CIAA_ACC / BANK_502.sch
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PCB / ACC / CIAA_ACC / BANKS_HP.sch
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PCB / ACC / CIAA_ACC / BANKS_HR.sch
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PCB / ACC / CIAA_ACC / ciaa_acc.kicad_pcb
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PCB / ACC / CIAA_ACC / ciaa_acc.sch
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PCB / ACC / CIAA_ACC / Digital_IO.sch
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PCB / ACC / CIAA_ACC / Expansion.sch
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PCB / ACC / CIAA_ACC / FMC-Power.sch
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PCB / ACC / CIAA_ACC / FPGA-Power.sch
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PCB / ACC / CIAA_ACC / OneBank.sch
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PCB / ACC / CIAA_ACC / PMIC.sch
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PCB / ACC / CIAA_ACC / Principal.sch
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PCB / ACC / CIAA_ACC / RTC-HDMI.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / cpu.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / EDU_CIAA_K60.kicad_pcb
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PCB / EDU-FSL / EDU_CIAA_K60 / EDU_CIAA_K60.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / fuente.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / gpio.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / JTAG.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / on_board_io.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / rsS485.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / usb_otg.sch
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PCB / EDU-INTEL / cpu.sch
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PCB / EDU-INTEL / edk.kicad_pcb
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PCB / EDU-INTEL / edk.sch
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PCB / EDU-INTEL / power.sch
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PCB / EDU-INTEL / sd_card.sch
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PCB / EDU-INTEL / usb.sch
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PCB / EDU-NXP / cpu.sch
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PCB / EDU-NXP / edu-ciaa-nxp.kicad_pcb
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PCB / EDU-NXP / edu-ciaa-nxp.sch
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PCB / EDU-NXP / fuente.sch
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PCB / EDU-NXP / gpio.sch
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PCB / EDU-NXP / ON_BOARD_IO.sch
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PCB / EDU-NXP / rsS485_can.sch
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PCB / EDU-NXP / usb.sch
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PCB / EDU-XILINX / ProyectoKicad / Bank14.sch
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PCB / EDU-XILINX / ProyectoKicad / Bank15.sch
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PCB / EDU-XILINX / ProyectoKicad / Bank35.sch
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PCB / EDU-XILINX / ProyectoKicad / EduCiaaX.sch
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PCB / EDU-XILINX / ProyectoKicad / FPGAConfig.sch
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PCB / EDU-XILINX / ProyectoKicad / FPGAPower.sch
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PCB / EDU-XILINX / ProyectoKicad / Power.sch
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PCB / EDU-XILINX / ProyectoKicad / Usb.sch
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PCB / FSL-MINI / CIAA_FSL_MINI.kicad_pcb
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PCB / FSL-MINI / CIAA_FSL_MINI.sch
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PCB / FSL-MINI / cpu.sch
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PCB / FSL-MINI / ethernet.sch
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PCB / FSL-MINI / fuente.sch
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PCB / FSL-MINI / IO.sch
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PCB / FSL-MINI / memories.sch
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PCB / FSL-MINI / usb_otg.sch
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PCB / FSL / CIAA_K60 / analog.sch
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PCB / FSL / CIAA_K60 / analog_out.sch
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PCB / FSL / CIAA_K60 / CIAA_K60.kicad_pcb
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PCB / FSL / CIAA_K60 / CIAA_K60.sch
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PCB / FSL / CIAA_K60 / cpu.sch
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PCB / FSL / CIAA_K60 / din.sch
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PCB / FSL / CIAA_K60 / dout.sch
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PCB / FSL / CIAA_K60 / ethernet.sch
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PCB / FSL / CIAA_K60 / fuente.sch
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PCB / FSL / CIAA_K60 / gpio.sch
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PCB / FSL / CIAA_K60 / JTAG.sch
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PCB / FSL / CIAA_K60 / memories.sch
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PCB / FSL / CIAA_K60 / rsS485_rs232_can.sch
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PCB / FSL / CIAA_K60 / usb_otg.sch
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PCB / NXP / .kicad_pcb.kicad_pcb
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PCB / NXP / analog.sch
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PCB / NXP / analog_out.sch
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PCB / NXP / ciaa-nxp.kicad_pcb
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PCB / NXP / ciaa-nxp.sch
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PCB / NXP / cpu.sch
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PCB / NXP / din.sch
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PCB / NXP / dout.sch
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PCB / NXP / ethernet.sch
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PCB / NXP / fuente.sch
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PCB / NXP / gpio.sch
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PCB / NXP / mem.sch
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PCB / NXP / rsS485_rs232_can.sch
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PCB / NXP / usb_otg.sch
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PCB / PIC / analog.sch
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PCB / PIC / analog_out.sch
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PCB / PIC / ciaa-pic.kicad_pcb
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PCB / PIC / ciaa-pic.sch
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PCB / PIC / cpu.sch
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PCB / PIC / din.sch
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PCB / PIC / dout.sch
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PCB / PIC / ethernet.sch
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PCB / PIC / fuente.sch
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PCB / PIC / gpio.sch
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PCB / PIC / JTAG.sch
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PCB / PIC / mem.sch
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PCB / PIC / rsS485_rs232_can.sch
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PCB / PIC / usb_otg.sch
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PCB / pico / cpu.sch
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PCB / pico / debugger.sch
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PCB / pico / picociaa.kicad_pcb
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PCB / pico / picociaa.sch
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PCB / RX / hw / .kicad_pcb.kicad_pcb
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PCB / RX / hw / analog.sch
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PCB / RX / hw / analog_out.sch
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PCB / RX / hw / ciaa-rx.kicad_pcb
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PCB / RX / hw / ciaa-rx.sch
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PCB / RX / hw / cpu.sch
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PCB / RX / hw / din.sch
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PCB / RX / hw / dout.sch
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PCB / RX / hw / ethernet.sch
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PCB / RX / hw / fuente.sch
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PCB / RX / hw / gpio.sch
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PCB / RX / hw / mem.sch
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PCB / RX / hw / rsS485_rs232_can.sch
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PCB / RX / hw / usb_otg.sch
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PCB / Safety / BUS_ISA.sch
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PCB / Safety / CAN.sch
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PCB / Safety / CIAA_Safety_VTI_1.0.kicad_pcb
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PCB / Safety / CIAA_Safety_VTI_1.0.sch
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PCB / Safety / CPU.sch
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PCB / Safety / ETHERNET.sch
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PCB / Safety / MEM_FLASH_SPI.sch
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PCB / Safety / RM48L952.sch
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PCB / Safety / USB HOST - MEM SD.sch
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PCB / Safety / USB OTG.sch
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PCB / Safety / USB.sch
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PCB / Z3R0 / ciaa-z3r0.kicad_pcb
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PCB / Z3R0 / ciaa-z3r0.sch
Last update 5 years 8 months
by
Noelia Scotti
RJ45_SI-52003-F_PoE_ETH.kicad_mod(module RJ45_SI-52003-F_PoE_ETH (layer F.Cu) (tedit 53F7B0B9) (fp_text reference RJ45_SI-52003-F_PoE_ETH (at 0 -4.445) (layer F.SilkS) (effects (font (size 0.8128 0.8128) (thickness 0.2032))) ) (fp_text value VAL** (at 0 -2.54) (layer F.SilkS) (effects (font (size 0.9144 0.8636) (thickness 0.2032))) ) (fp_line (start 8.89 -14.605) (end -8.89 -14.605) (layer F.SilkS) (width 0.2032)) (fp_line (start 8.89 10.795) (end 8.89 -14.605) (layer F.SilkS) (width 0.2032)) (fp_line (start -8.89 10.795) (end -8.89 -14.605) (layer F.SilkS) (width 0.2032)) (fp_line (start 8.89 10.795) (end -8.89 10.795) (layer F.SilkS) (width 0.2032)) (pad 13 thru_hole circle (at -3.175 -13.716) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)) (pad 10 thru_hole circle (at -5.715 -8.89) (size 1.397 1.397) (drill 0.889) (layers *.Cu *.Mask)) (pad 8 thru_hole circle (at -3.175 -8.89) (size 1.397 1.397) (drill 0.889) (layers *.Cu *.Mask)) (pad 9 thru_hole circle (at -4.445 -6.35) (size 1.397 1.397) (drill 0.889) (layers *.Cu *.Mask)) (pad 11 thru_hole circle (at -4.445 -11.43) (size 1.397 1.397) (drill 0.889) (layers *.Cu *.Mask)) (pad 12 thru_hole circle (at -5.715 -13.716) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)) (pad 7 thru_hole circle (at 7.747 -3.048) (size 2.0828 2.0828) (drill 1.5748) (layers *.Cu *.Mask)) (pad 17 thru_hole circle (at 5.715 0) (size 3.81 3.81) (drill 3.2512) (layers *.Cu *.Mask)) (pad 1 thru_hole circle (at 5.715 -6.35) (size 1.397 1.397) (drill 0.889) (layers *.Cu *.Mask)) (pad 16 thru_hole circle (at -5.715 0) (size 3.81 3.81) (drill 3.2512) (layers *.Cu *.Mask)) (pad 6 thru_hole circle (at -7.747 -3.048) (size 2.0828 2.0828) (drill 1.5748) (layers *.Cu *.Mask)) (pad 3 thru_hole circle (at 3.175 -6.35) (size 1.397 1.397) (drill 0.889) (layers *.Cu *.Mask)) (pad 5 thru_hole circle (at 0.635 -6.35) (size 1.397 1.397) (drill 0.889) (layers *.Cu *.Mask)) (pad 2 thru_hole circle (at 4.445 -8.89) (size 1.397 1.397) (drill 0.889) (layers *.Cu *.Mask)) (pad 4 thru_hole circle (at 1.905 -8.89) (size 1.397 1.397) (drill 0.889) (layers *.Cu *.Mask)) (pad 15 thru_hole circle (at 5.461 -13.716) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)) (pad 14 thru_hole circle (at 2.921 -13.716) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)) )