Files

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Last update 5 years 7 months by Noelia Scotti
FilesPCBACCCIAA_ACC
..
doc
footprints
lib
output_files
tools
.gitignore
BANKS_HP.sch
BANKS_HR.sch
BANK_0.sch
BANK_112.sch
BANK_500.sch
BANK_501.sch
BANK_502.sch
Digital_IO.sch
Expansion.sch
FMC-Power.sch
FPGA-Power.sch
OneBank.sch
PMIC.sch
Principal.sch
README.md
RTC-HDMI.sch
ciaa_acc.kicad_pcb
ciaa_acc.net
ciaa_acc.pro
ciaa_acc.sch
fp-lib-table
sym-lib-table
ciaa_acc.pro
update=Thu 28 Mar 2019 02:31:15 PM -03 version=1 last_client=kicad [pcbnew] version=1 LastNetListRead= UseCmpFile=1 PadDrill=0.600000000000 PadDrillOvalY=0.600000000000 PadSizeH=1.500000000000 PadSizeV=1.500000000000 PcbTextSizeV=1.500000000000 PcbTextSizeH=1.500000000000 PcbTextThickness=0.300000000000 ModuleTextSizeV=1.000000000000 ModuleTextSizeH=1.000000000000 ModuleTextSizeThickness=0.150000000000 SolderMaskClearance=0.000000000000 SolderMaskMinWidth=0.000000000000 DrawSegmentWidth=0.200000000000 BoardOutlineThickness=0.100000000000 ModuleOutlineThickness=0.150000000000 [cvpcb] version=1 NetIExt=net [general] version=1 [eeschema] version=1 LibDir= [schematic_editor] version=1 PageLayoutDescrFile= PlotDirectoryName=output_files/ SubpartIdSeparator=0 SubpartFirstId=65 NetFmtName= SpiceAjustPassiveValues=0 LabSize=118 ERC_TestSimilarLabels=1
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