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elektro
ltspice
seeed
19inch.lbr
40xx.lbr
41xx.lbr
45xx.lbr
74ac-logic.lbr
74ttl-din.lbr
74xx-eu.lbr
74xx-little-de.lbr
74xx-little-us.lbr
74xx-us.lbr
751xx.lbr
ChangeLog.txt
DESCRIPTION
IQD-Frequency-Products.lbr
README.txt
advanced-test-technologies.lbr
agilent-technologies.lbr
allegro.lbr
altera-cyclone-II.lbr
altera-cyclone-III.lbr
altera-stratix-iv.lbr
altera.lbr
am29-memory.lbr
amd-mach.lbr
amd.lbr
amis.lbr
analog-devices.lbr
aplus.lbr
ase.lbr
atmel.lbr
austriamicrosystems.lbr
avago.lbr
axis.lbr
battery.lbr
belton-engineering.lbr
burr-brown.lbr
busbar.lbr
buzzer.lbr
c-trimm.lbr
california-micro-devices.lbr
capacitor-wima.lbr
chipcard-siemens.lbr
cirrus-logic.lbr
con-3m.lbr
con-4ucon.lbr
con-amp-champ.lbr
con-amp-micromatch.lbr
con-amp-mt.lbr
con-amp-mt6.lbr
con-amp-quick.lbr
con-amp-te.lbr
con-amp.lbr
con-amphenol.lbr
con-avx.lbr
con-berg.lbr
con-bosch.lbr
con-chipcard-iso7816.lbr
con-coax.lbr
con-commcon.lbr
con-conrad.lbr
con-cpci.lbr
con-cui.lbr
con-cypressindustries.lbr
con-deutsch.lbr
con-dil.lbr
con-ebyelectro.lbr
con-elco.lbr
con-erni.lbr
con-faston.lbr
con-fci.lbr
con-friwo.lbr
con-garry.lbr
con-harting-h.lbr
con-harting-ml.lbr
con-harting-v.lbr
con-harting.lbr
con-hirose.lbr
con-hirschmann.lbr
con-jack.lbr
con-jae.lbr
con-jst.lbr
con-kycon.lbr
con-kyocera-elco.lbr
con-lemo.lbr
con-leotronics.lbr
con-lsta.lbr
con-lstb.lbr
con-lumberg.lbr
con-ml.lbr
con-molex.lbr
con-neutrik_ag.lbr
con-omron.lbr
con-panasonic.lbr
con-panduit.lbr
con-pc.lbr
con-pc104.lbr
con-phoenix-254.lbr
con-phoenix-3.81.lbr
con-phoenix-350.lbr
con-phoenix-500.lbr
con-phoenix-508.lbr
con-phoenix-762.lbr
con-phoenix-me_max.lbr
con-phoenix-mkds_5.lbr
con-phoenix-smkdsp.lbr
con-ptr500.lbr
con-pulse.lbr
con-rib.lbr
con-samtec.lbr
con-shallin.lbr
con-shiua-chyuan.lbr
con-stewart.lbr
con-stocko.lbr
con-subd.lbr
con-sullinselectronics.lbr
con-thomas-betts.lbr
con-tyco.lbr
con-tycoelectronics.lbr
con-vg.lbr
con-wago-500.lbr
con-wago-508.lbr
con-wago.lbr
con-wago255.lbr
con-weidmueller-sl35.lbr
con-wenzhou-yihua.lbr
con-xmultiple.lbr
con-yamaichi.lbr
crystal-geyer_V1_0.lbr
crystal.lbr
csr.lbr
cypress.lbr
davicom.lbr
dc-dc-converter.lbr
dimensions.lbr
diode.lbr
discrete.lbr
display-hp.lbr
display-kingbright.lbr
display-lcd.lbr
docu-dummy.lbr
dom-key.lbr
eagle-ltspice.lbr
ecl.lbr
em-microelectronic.lbr
etx-board.lbr
exar.lbr
fairchild-semic.lbr
farnell.lbr
fiber-optic-hp.lbr
fiber-optic-siemens.lbr
fifo.lbr
flexipanel.lbr
fox-electronics.lbr
frames.lbr
freescale.lbr
ftdichip.lbr
fujitsu.lbr
fuse.lbr
gennum.lbr
halo-electronics.lbr
heatsink.lbr
holes.lbr
holtek.lbr
ic-package.lbr
inductor-coilcraft.lbr
inductor-neosid.lbr
inductor-nkl.lbr
inductors.lbr
infineon-tricore.lbr
infineon.lbr
intersil-techwell.lbr
intersil.lbr
ir.lbr
isd.lbr
johanson-technology.lbr
jump-0r-smd.lbr
jumper.lbr
lantronix.lbr
lattice.lbr
lc-filter.lbr
led-7-segment.lbr
led-citizen-electronics.lbr
led-lumiled.lbr
led.lbr
lem.lbr
libraries.json
librerias texas lm555.lbr
linear-technology.lbr
linear.lbr
linx.lbr
logo.lbr
lprs.lbr
lsi-computer-systems.lbr
lumiled.lbr
marks.lbr
maxim.lbr
maxstream.lbr
melexis.lbr
memory-hitachi.lbr
memory-idt.lbr
memory-micron.lbr
memory-motorola-dram.lbr
memory-nec.lbr
memory-samsung.lbr
memory-sram.lbr
memory.lbr
mems.lbr
micrel.lbr
micro-cyrod.lbr
micro-fujitsu.lbr
micro-harris.lbr
micro-hitachi.lbr
micro-infineon.lbr
micro-intel.lbr
micro-mc68000.lbr
micro-motorola.lbr
micro-philips.lbr
micro-renesas.lbr
micro-samsung.lbr
micro-siemens.lbr
microchip.lbr
micron.lbr
micronas.lbr
microphon.lbr
microwave.lbr
midori-sensor.lbr
minicircuits.lbr
mitsubishi-semiconductor.lbr
motorola-sensor-driver.lbr
murata-filter.lbr
murata-sensor.lbr
nanotec.lbr
national-instruments.lbr
national-semiconductor.lbr
nec-lqfp100-pack.lbr
nec.lbr
nrj-semiconductor.lbr
omnivision.lbr
on-semiconductor.lbr
opto-honeywell-3000.lbr
opto-honeywell-4000.lbr
opto-honeywell.lbr
opto-micro-linear.lbr
opto-trans-siemens.lbr
opto-transmittter-hp.lbr
opto-vishay.lbr
optocoupler.lbr
pal.lbr
philips-semiconductors.lbr
photo-elements.lbr
piher.lbr
pinhead.lbr
plcc-socket.lbr
pld-intel.lbr
plxtech.lbr
pot-vitrohm.lbr
pot-xicor.lbr
pot.lbr
ptc-ntc.lbr
quantum-research-group.lbr
rcl.lbr
recom-international.lbr
rectifier.lbr
ref-packages-longpad.lbr
ref-packages.lbr
relay.lbr
renesas.lbr
resistor-bourns.lbr
resistor-dil.lbr
resistor-net.lbr
resistor-power.lbr
resistor-ruf.lbr
resistor-shunt.lbr
resistor-sil.lbr
resistor.lbr
rf-micro-devices.lbr
rf-solutions.lbr
rohm.lbr
roundsolutions.lbr
semicon-smd-ipc.lbr
sensor-comus-group.lbr
sensor-heraeus.lbr
sensor-infratec.lbr
sharp.lbr
silabs.lbr
sim-technology.lbr
sipex.lbr
smd-ipc.lbr
smd-special.lbr
solomon-systech.lbr
solpad.lbr
speaker.lbr
special-drill.lbr
special.lbr
st-microelectronics.lbr
stm32xx.lbr
supertex.lbr
supply1.lbr
supply2.lbr
switch-alps.lbr
switch-coto.lbr
switch-dil.lbr
switch-misc.lbr
switch-omron.lbr
switch-raychem.lbr
switch-reed.lbr
switch.lbr
telcom.lbr
telecontrolli.lbr
telefunken.lbr
test-mate.lbr
testpad.lbr
texas-sn55-sn75.lbr
texas.lbr
toshiba.lbr
traco-electronic.lbr
trafo-bei.lbr
trafo-hammondmfg.lbr
trafo-siemens.lbr
trafo-xicon.lbr
trafo.lbr
transformer-pulse.lbr
transistor-fet.lbr
transistor-neu-to92.lbr
transistor-npn.lbr
transistor-pnp.lbr
transistor-power.lbr
transistor-small-signal.lbr
transistor.lbr
triac.lbr
trimble.lbr
tripas.lbr
u-blox.lbr
uln-udn.lbr
v-reg-micrel.lbr
v-reg.lbr
varistor.lbr
wafer-scale-psd.lbr
wirepad.lbr
xicor.lbr
xilinx-virtex-v5.lbr
xilinx-xc18v.lbr
xilinx-xc9.lbr
xilinx-xcv.lbr
zetex.lbr
zilog.lbr
gennum.lbr
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direction="out" rot="R90"/> <pin name="ACLK3" x="12.7" y="-40.64" length="short" direction="out" rot="R90"/> <pin name="IO_VDD@1" x="15.24" y="-40.64" length="short" direction="pwr" rot="R90"/> <pin name="ASR_SEL2" x="17.78" y="-40.64" length="short" direction="in" rot="R90"/> <pin name="ASR_SEL1" x="38.1" y="-20.32" length="short" direction="in" rot="R180"/> <pin name="ASR_SEL0" x="38.1" y="-17.78" length="short" direction="in" rot="R180"/> <pin name="TIMING_OUT_1" x="38.1" y="-15.24" length="short" direction="out" rot="R180"/> <pin name="TIMING_OUT_2" x="38.1" y="-12.7" length="short" direction="out" rot="R180"/> <pin name="TIMING_OUT_3" x="38.1" y="-10.16" length="short" direction="out" rot="R180"/> <pin name="IO_VDD@2" x="38.1" y="-7.62" length="short" direction="pwr" rot="R180"/> <pin name="TIMING_OUT_4" x="38.1" y="-5.08" length="short" direction="out" rot="R180"/> <pin name="TIMING_OUT_5" x="38.1" y="-2.54" length="short" direction="out" rot="R180"/> <pin name="TIMING_OUT_6" x="38.1" y="0" length="short" direction="out" rot="R180"/> <pin name="TIMING_OUT_7" x="38.1" y="2.54" length="short" direction="out" rot="R180"/> <pin name="TIMING_OUT_8" x="38.1" y="5.08" length="short" direction="out" rot="R180"/> <pin name="CORE_VDD@1" x="38.1" y="7.62" length="short" direction="pwr" rot="R180"/> <pin name="LVDS/PCLK3_VDD" x="38.1" y="10.16" length="short" direction="pwr" rot="R180"/> <pin name="!PCLK3" x="38.1" y="12.7" length="short" direction="out" rot="R180"/> <pin name="PCLK3" x="38.1" y="15.24" length="short" direction="out" rot="R180"/> <pin name="LVDS/PCLK3_GND" x="38.1" y="17.78" length="short" direction="pwr" rot="R180"/> <pin name="PCLK2" x="17.78" y="38.1" length="short" direction="out" rot="R270"/> <pin name="IO_VDD@3" x="15.24" y="38.1" length="short" direction="pwr" rot="R270"/> <pin name="PCLK1" x="12.7" y="38.1" length="short" direction="out" rot="R270"/> <pin name="PCLK1&amp;2_GND" x="10.16" y="38.1" length="short" direction="pwr" rot="R270"/> <pin name="PCLK1&amp;2_VDD" x="7.62" y="38.1" length="short" direction="pwr" rot="R270"/> <pin name="PHS_VDD" x="5.08" y="38.1" length="short" direction="pwr" rot="R270"/> <pin name="PHS_GND" x="2.54" y="38.1" length="short" direction="pwr" rot="R270"/> <pin name="JTAG/!HOST" x="0" y="38.1" length="short" direction="in" rot="R270"/> <pin name="SCLK_TCLK" x="-2.54" y="38.1" length="short" direction="in" rot="R270"/> <pin name="SDIN_TDI" x="-5.08" y="38.1" length="short" direction="in" rot="R270"/> <pin name="SDOUT_TDO" x="-7.62" y="38.1" length="short" direction="out" rot="R270"/> <pin name="!CS!_TMS" x="-10.16" y="38.1" length="short" direction="in" rot="R270"/> <pin name="!RESET" x="-12.7" y="38.1" length="short" direction="in" rot="R270"/> <pin name="IO_VDD@4" x="-15.24" y="38.1" length="short" direction="pwr" rot="R270"/> <pin name="NC@2" x="-17.78" y="38.1" length="short" direction="nc" rot="R270"/> <pin name="!GENCLOCK" x="-20.32" y="38.1" length="short" direction="in" rot="R270"/> </symbol> <symbol name="GS4910B"> <wire x1="-38.1" y1="-38.1" x2="35.56" y2="-38.1" width="0.2032" layer="94"/> <wire x1="35.56" y1="-38.1" x2="35.56" y2="35.56" width="0.2032" layer="94"/> <wire x1="35.56" y1="35.56" x2="-38.1" y2="35.56" width="0.2032" layer="94"/> <wire x1="-38.1" y1="35.56" x2="-38.1" y2="-38.1" width="0.2032" layer="94"/> <text x="-5.08" y="1.27" size="1.778" layer="95">&gt;NAME</text> <text x="-5.08" y="-2.54" size="1.778" layer="96">&gt;VALUE</text> <pin name="LOCK_LOST" x="-43.18" y="17.78" length="middle" direction="out"/> <pin name="REF_LOST" x="-43.18" y="15.24" length="middle" direction="out"/> <pin name="VID_PLL_VDD" x="-43.18" y="12.7" length="middle" direction="pwr"/> <pin name="VID_PLL_GND" x="-43.18" y="10.16" length="middle" direction="pwr"/> <pin name="XTAL_VDD" x="-43.18" y="7.62" length="middle" direction="pwr"/> <pin name="X1" x="-43.18" y="5.08" length="middle" direction="in"/> <pin name="X2" x="-43.18" y="2.54" length="middle" direction="out"/> <pin name="XTAL_GND" x="-43.18" y="0" length="middle" direction="pwr"/> <pin name="CORE_GND" x="-43.18" y="-2.54" length="middle" direction="pwr"/> <pin name="AVDD" x="-43.18" y="-5.08" length="middle" direction="pwr"/> <pin name="NC" x="-43.18" y="-7.62" length="middle" direction="nc"/> <pin name="AGND" x="-43.18" y="-10.16" length="middle" direction="pwr"/> <pin name="AUD_PLL_GND" x="-43.18" y="-12.7" length="middle" direction="pwr"/> <pin name="AUD_PLL_VDD" x="-43.18" y="-15.24" length="middle" direction="pwr"/> <pin name="10FID" x="-43.18" y="-17.78" length="middle" direction="in"/> <pin name="HSYNC" x="-43.18" y="-20.32" length="middle" direction="in"/> <pin name="VSYNC" x="-20.32" y="-43.18" length="middle" direction="in" rot="R90"/> <pin name="IO_VDD" x="-17.78" y="-43.18" length="middle" direction="pwr" rot="R90"/> <pin name="FSYNC" x="-15.24" y="-43.18" length="middle" direction="in" rot="R90"/> <pin name="NC@1" x="-12.7" y="-43.18" length="middle" direction="nc" rot="R90"/> <pin name="VID_STD0" x="-10.16" y="-43.18" length="middle" direction="in" rot="R90"/> <pin name="VID_STD1" x="-7.62" y="-43.18" length="middle" direction="in" rot="R90"/> <pin name="VID_STD2" x="-5.08" y="-43.18" length="middle" direction="in" rot="R90"/> <pin name="VID_STD3" x="-2.54" y="-43.18" length="middle" direction="in" rot="R90"/> <pin name="VID_STD4" x="0" y="-43.18" length="middle" direction="in" rot="R90"/> <pin name="CORE_VDD" x="2.54" y="-43.18" length="middle" direction="pwr" rot="R90"/> <pin name="VID_STD5" x="5.08" y="-43.18" length="middle" direction="in" rot="R90"/> <pin name="NC@2" x="7.62" y="-43.18" length="middle" direction="nc" rot="R90"/> <pin name="NC@3" x="10.16" y="-43.18" length="middle" direction="nc" rot="R90"/> <pin name="NC@4" x="12.7" y="-43.18" length="middle" direction="nc" rot="R90"/> <pin name="IO_VDD@1" x="15.24" y="-43.18" length="middle" direction="pwr" rot="R90"/> <pin name="AGND@1" x="17.78" y="-43.18" length="middle" direction="pwr" rot="R90"/> <pin name="AGND@2" x="40.64" y="-20.32" length="middle" direction="pwr" rot="R180"/> <pin name="AGND@3" x="40.64" y="-17.78" length="middle" direction="pwr" rot="R180"/> <pin name="TIMING_OUT_1" x="40.64" y="-15.24" length="middle" direction="out" rot="R180"/> <pin name="TIMING_OUT_2" x="40.64" y="-12.7" length="middle" direction="out" rot="R180"/> <pin name="TIMING_OUT_3" x="40.64" y="-10.16" length="middle" direction="out" rot="R180"/> <pin name="IO_VDD@2" x="40.64" y="-7.62" length="middle" direction="pwr" rot="R180"/> <pin name="TIMING_OUT_4" x="40.64" y="-5.08" length="middle" direction="out" rot="R180"/> <pin name="TIMING_OUT_5" x="40.64" y="-2.54" length="middle" direction="out" rot="R180"/> <pin name="TIMING_OUT_6" x="40.64" y="0" length="middle" direction="out" rot="R180"/> <pin name="TIMING_OUT_7" x="40.64" y="2.54" length="middle" direction="out" rot="R180"/> <pin name="TIMING_OUT_8" x="40.64" y="5.08" length="middle" direction="out" rot="R180"/> <pin name="CORE_VDD@1" x="40.64" y="7.62" length="middle" direction="pwr" rot="R180"/> <pin name="LVDS/PCLK3_VDD" x="40.64" y="10.16" length="middle" direction="pwr" rot="R180"/> <pin name="!PCLK3" x="40.64" y="12.7" length="middle" direction="out" rot="R180"/> <pin name="PCLK3" x="40.64" y="15.24" length="middle" direction="out" rot="R180"/> <pin name="LVDS/PCLK3_GND" x="40.64" y="17.78" length="middle" direction="pwr" rot="R180"/> <pin name="PCLK2" x="17.78" y="40.64" length="middle" direction="out" rot="R270"/> <pin name="IO_VDD@3" x="15.24" y="40.64" length="middle" direction="pwr" rot="R270"/> <pin name="PCLK1" x="12.7" y="40.64" length="middle" direction="out" rot="R270"/> <pin name="PCLK1&amp;2_GND" x="10.16" y="40.64" length="middle" direction="pwr" rot="R270"/> <pin name="PCLK1&amp;2_VDD" x="7.62" y="40.64" length="middle" direction="pwr" rot="R270"/> <pin name="PHS_VDD" x="5.08" y="40.64" length="middle" direction="pwr" rot="R270"/> <pin name="PHS_GND" x="2.54" y="40.64" length="middle" direction="pwr" rot="R270"/> <pin name="JTAG/!HOST" x="0" y="40.64" length="middle" direction="in" rot="R270"/> <pin name="SCLK_TCLK" x="-2.54" y="40.64" length="middle" direction="in" rot="R270"/> <pin name="SDIN_TDI" x="-5.08" y="40.64" length="middle" direction="in" rot="R270"/> <pin name="SDOUT_TDO" x="-7.62" y="40.64" length="middle" direction="out" rot="R270"/> <pin name="!CS!_TMS" x="-10.16" y="40.64" length="middle" direction="in" rot="R270"/> <pin name="!RESET" x="-12.7" y="40.64" length="middle" direction="in" rot="R270"/> <pin name="IO_VDD@4" x="-15.24" y="40.64" length="middle" direction="pwr" rot="R270"/> <pin name="NC@5" x="-17.78" y="40.64" length="middle" direction="nc" rot="R270"/> <pin name="!GENCLOCK" x="-20.32" y="40.64" length="middle" direction="in" rot="R270"/> </symbol> <symbol name="GS4915"> <wire x1="-25.4" y1="-27.94" x2="25.4" y2="-27.94" width="0.2032" layer="94"/> <wire x1="25.4" y1="-27.94" x2="25.4" y2="25.4" width="0.2032" layer="94"/> <wire x1="25.4" y1="25.4" x2="-25.4" y2="25.4" width="0.2032" layer="94"/> <wire x1="-25.4" y1="25.4" x2="-25.4" y2="-27.94" width="0.2032" layer="94"/> <text x="-5.08" y="-1.27" size="1.778" layer="95">&gt;NAME</text> <text x="-5.08" y="-5.08" size="1.778" layer="96">&gt;VALUE</text> <pin name="REG_VDD" x="-27.94" y="10.16" length="short" direction="pwr"/> <pin name="AGND" x="-27.94" y="7.62" length="short" direction="pwr"/> <pin name="PD_VDD" x="-27.94" y="5.08" length="short" direction="pwr"/> <pin name="CLKIN" x="-27.94" y="2.54" length="short" direction="in"/> <pin name="!CLKIN" x="-27.94" y="0" length="short" direction="in"/> <pin name="AGND@1" x="-27.94" y="-2.54" length="short" direction="pwr"/> <pin name="IN_VDD" x="-27.94" y="-5.08" length="short" direction="pwr"/> <pin name="CLKIN_SE" x="-27.94" y="-7.62" length="short" direction="in"/> <pin name="AGND@2" x="-27.94" y="-10.16" length="short" direction="pwr"/> <pin name="RESET" x="-27.94" y="-12.7" length="short" direction="in"/> <pin name="IPSEL" x="-12.7" y="-30.48" length="short" direction="in" rot="R90"/> <pin name="GND" x="-10.16" y="-30.48" length="short" direction="pwr" rot="R90"/> <pin name="BYPASS" x="-7.62" y="-30.48" length="short" direction="in" rot="R90"/> <pin name="AUTOBYPASS" x="-5.08" y="-30.48" length="short" direction="in" rot="R90"/> <pin name="D_VDD" x="-2.54" y="-30.48" length="short" direction="pwr" rot="R90"/> <pin name="FCTRL0" x="0" y="-30.48" length="short" direction="in" rot="R90"/> <pin name="FCTRL1" x="2.54" y="-30.48" length="short" direction="in" rot="R90"/> <pin name="DOUBLE" x="5.08" y="-30.48" length="short" direction="in" rot="R90"/> <pin name="SKEW_EN" x="7.62" y="-30.48" length="short" direction="in" rot="R90"/> <pin name="GND@1" x="10.16" y="-30.48" length="short" direction="pwr" rot="R90"/> <pin name="LOCK" x="27.94" y="-12.7" length="short" direction="out" rot="R180"/> <pin name="GND@2" x="27.94" y="-10.16" length="short" direction="pwr" rot="R180"/> <pin name="SE_VDD" x="27.94" y="-7.62" length="short" direction="pwr" rot="R180"/> <pin name="CLKOUT_SE" x="27.94" y="-5.08" length="short" direction="out" rot="R180"/> <pin name="D_VDD@1" x="27.94" y="-2.54" length="short" direction="pwr" rot="R180"/> <pin name="AGND@3" x="27.94" y="0" length="short" direction="pwr" rot="R180"/> <pin name="DIFF_OUT_VDD" x="27.94" y="2.54" length="short" direction="pwr" rot="R180"/> <pin name="!CLKOUT" x="27.94" y="5.08" length="short" direction="out" rot="R180"/> <pin name="CLKOUT" x="27.94" y="7.62" length="short" direction="out" rot="R180"/> <pin name="AGND@4" x="27.94" y="10.16" length="short" direction="pwr" rot="R180"/> <pin name="AGND@5" x="10.16" y="27.94" length="short" direction="pwr" rot="R270"/> <pin name="DIV_VDD" x="7.62" y="27.94" length="short" direction="pwr" rot="R270"/> <pin name="VCO" x="5.08" y="27.94" length="short" direction="in" rot="R270"/> <pin name="!VCO" x="2.54" y="27.94" length="short" direction="in" rot="R270"/> <pin name="VCO_GND" x="0" y="27.94" length="short" direction="pwr" rot="R270"/> <pin name="LF" x="-2.54" y="27.94" length="short" direction="in" rot="R270"/> <pin name="CP_RES" x="-5.08" y="27.94" length="short" direction="in" rot="R270"/> <pin name="CP_VDD" x="-7.62" y="27.94" length="short" direction="pwr" rot="R270"/> <pin name="VCO_VDD" x="-10.16" y="27.94" length="short" direction="pwr" rot="R270"/> <pin name="AGND@6" x="-12.7" y="27.94" length="short" direction="pwr" rot="R270"/> </symbol> <symbol name="GS2970"> <text x="-55.88" y="35.56" size="1.778" layer="95">&gt;NAME</text> <text x="-55.88" y="33.02" size="1.778" layer="96">&gt;VALUE</text> <pin name="VBG" x="-55.88" y="30.48" length="middle" direction="in"/> <pin name="LF" x="-55.88" y="27.94" length="middle" direction="in"/> <pin name="LB_CONT" x="-55.88" y="25.4" length="middle" direction="in"/> <pin name="VCO_VDD" x="-55.88" y="22.86" length="middle" direction="pwr"/> <pin name="STAT0" x="-55.88" y="20.32" length="middle" direction="out"/> <pin name="STAT1" x="-55.88" y="17.78" length="middle" direction="out"/> <pin name="IO_VDD" x="-55.88" y="15.24" length="middle" direction="pwr"/> <pin name="PCLK" x="-55.88" y="12.7" length="middle" direction="out"/> <pin name="DOUT18" x="-55.88" y="10.16" length="middle" direction="out"/> <pin name="DOUT17" x="-55.88" y="7.62" length="middle" direction="out"/> <pin name="A_VDD" x="-55.88" y="5.08" length="middle" direction="pwr"/> <pin name="PLL_VDD" x="-55.88" y="2.54" length="middle" direction="pwr"/> <pin name="RSV" x="-55.88" y="0" length="middle" direction="nc"/> <pin name="VCO_GND" x="-55.88" y="-2.54" length="middle" direction="pwr"/> <pin name="STAT2" x="-55.88" y="-5.08" length="middle" direction="out"/> <pin name="STAT3" x="-55.88" y="-7.62" length="middle" direction="out"/> <pin name="IO_GND" x="-55.88" y="-10.16" length="middle" direction="pwr"/> <pin name="DOUT19" x="-55.88" y="-12.7" length="middle" direction="out"/> <pin name="DOUT16" x="-55.88" y="-15.24" length="middle" direction="out"/> <pin name="DOUT15" x="-55.88" y="-17.78" length="middle" direction="out"/> <pin name="SDI" x="-55.88" y="-20.32" length="middle" direction="in"/> <pin name="A_GND" x="-55.88" y="-22.86" length="middle" direction="pwr"/> <pin name="PLL_VDD@1" x="-55.88" y="-25.4" length="middle" direction="pwr"/> <pin name="PLL_VDD@2" x="-55.88" y="-27.94" length="middle" direction="pwr"/> <pin name="STAT4" x="-55.88" y="-30.48" length="middle" direction="out"/> <pin name="STAT5" x="-30.48" y="30.48" length="middle" direction="out"/> <pin name="!RESET_TRSTIN" x="-30.48" y="27.94" length="middle" direction="out"/> <pin name="DOUT12" x="-30.48" y="25.4" length="middle" direction="out"/> <pin name="DOUT14" x="-30.48" y="22.86" length="middle" direction="out"/> <pin name="DOUT13" x="-30.48" y="20.32" length="middle" direction="out"/> <pin name="!SDI" x="-30.48" y="17.78" length="middle" direction="in"/> <pin name="A_GND@1" x="-30.48" y="15.24" length="middle" direction="pwr"/> <pin name="A_GND@2" x="-30.48" y="12.7" length="middle" direction="pwr"/> <pin name="PLL_GND" x="-30.48" y="10.16" length="middle" direction="pwr"/> <pin name="CORE_GND" x="-30.48" y="7.62" length="middle" direction="pwr"/> <pin name="CORE_VDD" x="-30.48" y="5.08" length="middle" direction="pwr"/> <pin name="SW_EN" x="-30.48" y="2.54" length="middle" direction="in"/> <pin name="JTAG/!HOST" x="-30.48" y="0" length="middle" direction="in"/> <pin name="IO_GND@1" x="-30.48" y="-2.54" length="middle" direction="pwr"/> <pin name="IO_VDD@1" x="-30.48" y="-5.08" length="middle" direction="pwr"/> <pin name="SDI_VDD" x="-30.48" y="-7.62" length="middle" direction="pwr"/> <pin name="SDI_GND" x="-30.48" y="-10.16" length="middle" direction="pwr"/> <pin name="A_GND@3" x="-30.48" y="-12.7" length="middle" direction="pwr"/> <pin name="PLL_GND@1" x="-30.48" y="-15.24" length="middle" direction="pwr"/> <pin name="CORE_GND@1" x="-30.48" y="-17.78" length="middle" direction="pwr"/> <pin name="CORE_VDD@1" x="-30.48" y="-20.32" length="middle" direction="pwr"/> <pin name="SDOUT_TDO" x="-30.48" y="-22.86" length="middle" direction="out"/> <pin name="SDIN_TDIIN" x="-30.48" y="-25.4" length="middle" direction="out"/> <pin name="DOUT10" x="-30.48" y="-27.94" length="middle" direction="out"/> <pin name="DOUT11" x="-30.48" y="-30.48" length="middle" direction="out"/> <pin name="TERM" x="-5.08" y="30.48" length="middle" direction="in"/> <pin name="RSV@1" x="-5.08" y="27.94" length="middle" direction="nc"/> <pin name="A_GND@4" x="-5.08" y="25.4" length="middle" direction="pwr"/> <pin name="PLL_GND@2" x="-5.08" y="22.86" length="middle" direction="pwr"/> <pin name="CORE_GND@2" x="-5.08" y="20.32" length="middle" direction="pwr"/> <pin name="CORE_VDD@2" x="-5.08" y="17.78" length="middle" direction="pwr"/> <pin name="!CS!_TMS" x="-5.08" y="15.24" length="middle" direction="in"/> <pin name="SCLK_TCK" x="-5.08" y="12.7" length="middle" direction="in"/> <pin name="DOUT8" x="-5.08" y="10.16" length="middle" direction="out"/> <pin name="DOUT9" x="-5.08" y="7.62" length="middle" direction="out"/> <pin name="RSV@2" x="-5.08" y="5.08" length="middle" direction="nc"/> <pin name="RSV@3" x="-5.08" y="2.54" length="middle" direction="nc"/> <pin name="!RC_BYP" x="-5.08" y="0" length="middle" direction="in"/> <pin name="RSV@4" x="-5.08" y="-2.54" length="middle" direction="nc"/> <pin name="CORE_GND@3" x="-5.08" y="-5.08" length="middle" direction="pwr"/> <pin name="CORE_VDD@3" x="-5.08" y="-7.62" length="middle" direction="pwr"/> <pin name="!SMPTE_BYPASS" x="-5.08" y="-10.16" length="middle"/> <pin name="DVB_ASI" x="-5.08" y="-12.7" length="middle"/> <pin name="IO_GND@2" x="-5.08" y="-15.24" length="middle" direction="pwr"/> <pin name="IO_VDD@2" x="-5.08" y="-17.78" length="middle" direction="pwr"/> <pin name="BUFF_VDD" x="-5.08" y="-20.32" length="middle" direction="pwr"/> <pin name="BUFF_GND" x="-5.08" y="-22.86" length="middle" direction="pwr"/> <pin name="AUDIO_EN/!DIS" x="-5.08" y="-25.4" length="middle" direction="in"/> <pin name="WCLK" x="-5.08" y="-27.94" length="middle" direction="out"/> <pin name="TIM_861" x="-5.08" y="-30.48" length="middle" direction="in"/> <pin name="XTAL_OUT" x="20.32" y="30.48" length="middle" direction="out"/> <pin name="20BIT/10BIT" x="20.32" y="27.94" length="middle" direction="in"/> <pin name="IOPROC_EN/!DIS" x="20.32" y="25.4" length="middle" direction="in"/> <pin name="DOUT6" x="20.32" y="22.86" length="middle" direction="out"/> <pin name="DOUT7" x="20.32" y="20.32" length="middle" direction="out"/> <pin name="SDO" x="20.32" y="17.78" length="middle" direction="out"/> <pin name="SDO_EN/!DIS" x="20.32" y="15.24" length="middle" direction="in"/> <pin name="AOUT_1/2" x="20.32" y="12.7" length="middle" direction="out"/> <pin name="ACLK" x="20.32" y="10.16" length="middle" direction="out"/> <pin name="AOUT_5/6" x="20.32" y="7.62" length="middle" direction="out"/> <pin name="XTAL2" x="20.32" y="5.08" length="middle" direction="in"/> <pin name="IO_GND@3" x="20.32" y="2.54" length="middle" direction="pwr"/> <pin name="DOUT1" x="20.32" y="0" length="middle" direction="out"/> <pin name="DOUT4" x="20.32" y="-2.54" length="middle" direction="out"/> <pin name="DOUT5" x="20.32" y="-5.08" length="middle" direction="out"/> <pin name="!SDO" x="20.32" y="-7.62" length="middle" direction="out"/> <pin name="STANDBY" x="20.32" y="-10.16" length="middle" direction="in"/> <pin name="AOUT_3/4" x="20.32" y="-12.7" length="middle" direction="out"/> <pin name="AMCLK" x="20.32" y="-15.24" length="middle" direction="out"/> <pin name="AOUT_7/8" x="20.32" y="-17.78" length="middle" direction="out"/> <pin name="XTAL1" x="20.32" y="-20.32" length="middle" direction="in"/> <pin name="IO_VDD@3" x="20.32" y="-22.86" length="middle" direction="pwr"/> <pin name="DOUT0" x="20.32" y="-25.4" length="middle" direction="out"/> <pin name="DOUT2" x="20.32" y="-27.94" length="middle" direction="out"/> <pin name="DOUT3" x="20.32" y="-30.48" length="middle" direction="out"/> </symbol> </symbols> <devicesets> <deviceset name="GS2974" prefix="IC"> <description>&lt;b&gt;Adaptive Cable Equalizer&lt;/b&gt;&lt;p&gt; Source: http://www.gennum.com/video/pdf/37184DOC.pdf</description> <gates> <gate name="G$1" symbol="GS2974" x="0" y="0"/> </gates> <devices> <device name="" package="QFN16-4X4"> <connects> <connect gate="G$1" pin="!AGC" pad="6"/> <connect gate="G$1" pin="!CD" pad="15"/> <connect gate="G$1" pin="!SDI" pad="3"/> <connect gate="G$1" pin="!SDO" pad="10"/> <connect gate="G$1" pin="AGC" pad="5"/> <connect gate="G$1" pin="BYPASS" pad="7"/> <connect gate="G$1" pin="EXP" pad="EXP"/> <connect gate="G$1" pin="MCLADJ" pad="8"/> <connect gate="G$1" pin="MUTE" pad="14"/> <connect gate="G$1" pin="SDI" pad="2"/> <connect gate="G$1" pin="SDO" pad="11"/> <connect gate="G$1" pin="VCC_A" pad="16"/> <connect gate="G$1" pin="VCC_D" pad="13"/> <connect gate="G$1" pin="VCC_E@1" pad="12"/> <connect gate="G$1" pin="VEE_A@1" pad="1"/> <connect gate="G$1" pin="VEE_A@2" pad="4"/> <connect gate="G$1" pin="VEE_D" pad="9"/> </connects> <technologies> <technology name=""> <attribute name="MF" value="" constant="no"/> <attribute name="MPN" value="GS2974ACNE3" constant="no"/> <attribute name="OC_FARNELL" value="1603763" constant="no"/> <attribute name="OC_NEWARK" value="12N2242" constant="no"/> </technology> </technologies> </device> </devices> </deviceset> <deviceset name="GS4911B" prefix="IC"> <description>&lt;b&gt;HD/SD/Graphics Clock and Timing Generator with GENLOCK&lt;/b&gt;&lt;p&gt; Source: http://www.gennum.com/video/pdf/36655DOC.pdf</description> <gates> <gate name="G$1" symbol="GS4911B" x="0" y="0"/> </gates> <devices> <device name="" package="QFN64-9X9"> <connects> <connect gate="G$1" pin="!CS!_TMS" pad="60"/> <connect gate="G$1" pin="!GENCLOCK" pad="64"/> <connect gate="G$1" pin="!PCLK3" pad="46"/> <connect gate="G$1" pin="!RESET" pad="61"/> <connect gate="G$1" pin="10FID" pad="15"/> <connect gate="G$1" pin="ACLK1" pad="28"/> <connect gate="G$1" pin="ACLK2" pad="29"/> <connect gate="G$1" pin="ACLK3" pad="30"/> <connect gate="G$1" pin="AGND" pad="12"/> <connect gate="G$1" pin="ASR_SEL0" pad="34"/> <connect gate="G$1" pin="ASR_SEL1" pad="33"/> <connect gate="G$1" pin="ASR_SEL2" pad="32"/> <connect gate="G$1" pin="AUD_PLL_GND" pad="13"/> <connect gate="G$1" pin="AUD_PLL_VDD" pad="14"/> <connect gate="G$1" pin="AVDD" pad="10"/> <connect gate="G$1" pin="CORE_GND" pad="9"/> <connect gate="G$1" pin="CORE_VDD" pad="26"/> <connect gate="G$1" pin="CORE_VDD@1" pad="44"/> <connect gate="G$1" pin="FSYNC" pad="19"/> <connect gate="G$1" pin="HSYNC" pad="16"/> <connect gate="G$1" pin="IO_VDD" pad="18"/> <connect gate="G$1" pin="IO_VDD@1" pad="31"/> <connect gate="G$1" pin="IO_VDD@2" pad="38"/> <connect gate="G$1" pin="IO_VDD@3" pad="50"/> <connect gate="G$1" pin="IO_VDD@4" pad="62"/> <connect gate="G$1" pin="JTAG/!HOST" pad="56"/> <connect gate="G$1" pin="LOCK_LOST" pad="1"/> <connect gate="G$1" pin="LVDS/PCLK3_GND" pad="48"/> <connect gate="G$1" pin="LVDS/PCLK3_VDD" pad="45"/> <connect gate="G$1" pin="NC" pad="11"/> <connect gate="G$1" pin="NC@1" pad="20"/> <connect gate="G$1" pin="NC@2" pad="63"/> <connect gate="G$1" pin="PCLK1" pad="51"/> <connect gate="G$1" pin="PCLK1&amp;2_GND" pad="52"/> <connect gate="G$1" pin="PCLK1&amp;2_VDD" pad="53"/> <connect gate="G$1" pin="PCLK2" pad="49"/> <connect gate="G$1" pin="PCLK3" pad="47"/> <connect gate="G$1" pin="PHS_GND" pad="55"/> <connect gate="G$1" pin="PHS_VDD" pad="54"/> <connect gate="G$1" pin="REF_LOST" pad="2"/> <connect gate="G$1" pin="SCLK_TCLK" pad="57"/> <connect gate="G$1" pin="SDIN_TDI" pad="58"/> <connect gate="G$1" pin="SDOUT_TDO" pad="59"/> <connect gate="G$1" pin="TIMING_OUT_1" pad="35"/> <connect gate="G$1" pin="TIMING_OUT_2" pad="36"/> <connect gate="G$1" pin="TIMING_OUT_3" pad="37"/> <connect gate="G$1" pin="TIMING_OUT_4" pad="39"/> <connect gate="G$1" pin="TIMING_OUT_5" pad="40"/> <connect gate="G$1" pin="TIMING_OUT_6" pad="41"/> <connect gate="G$1" pin="TIMING_OUT_7" pad="42"/> <connect gate="G$1" pin="TIMING_OUT_8" pad="43"/> <connect gate="G$1" pin="VID_PLL_GND" pad="4"/> <connect gate="G$1" pin="VID_PLL_VDD" pad="3"/> <connect gate="G$1" pin="VID_STD0" pad="21"/> <connect gate="G$1" pin="VID_STD1" pad="22"/> <connect gate="G$1" pin="VID_STD2" pad="23"/> <connect gate="G$1" pin="VID_STD3" pad="24"/> <connect gate="G$1" pin="VID_STD4" pad="25"/> <connect gate="G$1" pin="VID_STD5" pad="27"/> <connect gate="G$1" pin="VSYNC" pad="17"/> <connect gate="G$1" pin="X1" pad="6"/> <connect gate="G$1" pin="X2" pad="7"/> <connect gate="G$1" pin="XTAL_GND" pad="8"/> <connect gate="G$1" pin="XTAL_VDD" pad="5"/> </connects> <technologies> <technology name=""> <attribute name="MF" value="" constant="no"/> <attribute name="MPN" value="GS4911BCNE3" constant="no"/> <attribute name="OC_FARNELL" value="1603771" constant="no"/> <attribute name="OC_NEWARK" value="12N2245" constant="no"/> </technology> </technologies> </device> </devices> </deviceset> <deviceset name="GS4910B" prefix="IC"> <description>&lt;b&gt;HD/SD/Graphics Clock and Timing Generator with GENLOCK&lt;/b&gt;&lt;p&gt; Source: http://www.gennum.com/video/pdf/36655DOC.pdf</description> <gates> <gate name="G$1" symbol="GS4910B" x="0" y="0"/> </gates> <devices> <device name="" package="QFN64-9X9"> <connects> <connect gate="G$1" pin="!CS!_TMS" pad="60"/> <connect gate="G$1" pin="!GENCLOCK" pad="64"/> <connect gate="G$1" pin="!PCLK3" pad="46"/> <connect gate="G$1" pin="!RESET" pad="61"/> <connect gate="G$1" pin="10FID" pad="15"/> <connect gate="G$1" pin="AGND" pad="12"/> <connect gate="G$1" pin="AGND@1" pad="32"/> <connect gate="G$1" pin="AGND@2" pad="33"/> <connect gate="G$1" pin="AGND@3" pad="34"/> <connect gate="G$1" pin="AUD_PLL_GND" pad="13"/> <connect gate="G$1" pin="AUD_PLL_VDD" pad="14"/> <connect gate="G$1" pin="AVDD" pad="10"/> <connect gate="G$1" pin="CORE_GND" pad="9"/> <connect gate="G$1" pin="CORE_VDD" pad="26"/> <connect gate="G$1" pin="CORE_VDD@1" pad="44"/> <connect gate="G$1" pin="FSYNC" pad="19"/> <connect gate="G$1" pin="HSYNC" pad="16"/> <connect gate="G$1" pin="IO_VDD" pad="18"/> <connect gate="G$1" pin="IO_VDD@1" pad="31"/> <connect gate="G$1" pin="IO_VDD@2" pad="38"/> <connect gate="G$1" pin="IO_VDD@3" pad="50"/> <connect gate="G$1" pin="IO_VDD@4" pad="62"/> <connect gate="G$1" pin="JTAG/!HOST" pad="56"/> <connect gate="G$1" pin="LOCK_LOST" pad="1"/> <connect gate="G$1" pin="LVDS/PCLK3_GND" pad="48"/> <connect gate="G$1" pin="LVDS/PCLK3_VDD" pad="45"/> <connect gate="G$1" pin="NC" pad="11"/> <connect gate="G$1" pin="NC@1" pad="20"/> <connect gate="G$1" pin="NC@2" pad="28"/> <connect gate="G$1" pin="NC@3" pad="29"/> <connect gate="G$1" pin="NC@4" pad="30"/> <connect gate="G$1" pin="NC@5" pad="63"/> <connect gate="G$1" pin="PCLK1" pad="51"/> <connect gate="G$1" pin="PCLK1&amp;2_GND" pad="52"/> <connect gate="G$1" pin="PCLK1&amp;2_VDD" pad="53"/> <connect gate="G$1" pin="PCLK2" pad="49"/> <connect gate="G$1" pin="PCLK3" pad="47"/> <connect gate="G$1" pin="PHS_GND" pad="55"/> <connect gate="G$1" pin="PHS_VDD" pad="54"/> <connect gate="G$1" pin="REF_LOST" pad="2"/> <connect gate="G$1" pin="SCLK_TCLK" pad="57"/> <connect gate="G$1" pin="SDIN_TDI" pad="58"/> <connect gate="G$1" pin="SDOUT_TDO" pad="59"/> <connect gate="G$1" pin="TIMING_OUT_1" pad="35"/> <connect gate="G$1" pin="TIMING_OUT_2" pad="36"/> <connect gate="G$1" pin="TIMING_OUT_3" pad="37"/> <connect gate="G$1" pin="TIMING_OUT_4" pad="39"/> <connect gate="G$1" pin="TIMING_OUT_5" pad="40"/> <connect gate="G$1" pin="TIMING_OUT_6" pad="41"/> <connect gate="G$1" pin="TIMING_OUT_7" pad="42"/> <connect gate="G$1" pin="TIMING_OUT_8" pad="43"/> <connect gate="G$1" pin="VID_PLL_GND" pad="4"/> <connect gate="G$1" pin="VID_PLL_VDD" pad="3"/> <connect gate="G$1" pin="VID_STD0" pad="21"/> <connect gate="G$1" pin="VID_STD1" pad="22"/> <connect gate="G$1" pin="VID_STD2" pad="23"/> <connect gate="G$1" pin="VID_STD3" pad="24"/> <connect gate="G$1" pin="VID_STD4" pad="25"/> <connect gate="G$1" pin="VID_STD5" pad="27"/> <connect gate="G$1" pin="VSYNC" pad="17"/> <connect gate="G$1" pin="X1" pad="6"/> <connect gate="G$1" pin="X2" pad="7"/> <connect gate="G$1" pin="XTAL_GND" pad="8"/> <connect gate="G$1" pin="XTAL_VDD" pad="5"/> </connects> <technologies> <technology name=""> <attribute name="MF" value="" constant="no"/> <attribute name="MPN" value="" constant="no"/> <attribute name="OC_FARNELL" value="unknown" constant="no"/> <attribute name="OC_NEWARK" value="unknown" constant="no"/> </technology> </technologies> </device> </devices> </deviceset> <deviceset name="GS4915" prefix="IC"> <description>&lt;b&gt;ClockCleaner&lt;/b&gt;&lt;p&gt; Source: http://www.gennum.com/video/pdf/39145DOC.pdf</description> <gates> <gate name="G$1" symbol="GS4915" x="0" y="0"/> </gates> <devices> <device name="" package="QFN40-6X6"> <connects> <connect gate="G$1" pin="!CLKIN" pad="5"/> <connect gate="G$1" pin="!CLKOUT" pad="28"/> <connect gate="G$1" pin="!VCO" pad="34"/> <connect gate="G$1" pin="AGND" pad="2"/> <connect gate="G$1" pin="AGND@1" pad="6"/> <connect gate="G$1" pin="AGND@2" pad="9"/> <connect gate="G$1" pin="AGND@3" pad="26"/> <connect gate="G$1" pin="AGND@4" pad="30"/> <connect gate="G$1" pin="AGND@5" pad="31"/> <connect gate="G$1" pin="AGND@6" pad="40"/> <connect gate="G$1" pin="AUTOBYPASS" pad="14"/> <connect gate="G$1" pin="BYPASS" pad="13"/> <connect gate="G$1" pin="CLKIN" pad="4"/> <connect gate="G$1" pin="CLKIN_SE" pad="8"/> <connect gate="G$1" pin="CLKOUT" pad="29"/> <connect gate="G$1" pin="CLKOUT_SE" pad="24"/> <connect gate="G$1" pin="CP_RES" pad="37"/> <connect gate="G$1" pin="CP_VDD" pad="38"/> <connect gate="G$1" pin="DIFF_OUT_VDD" pad="27"/> <connect gate="G$1" pin="DIV_VDD" pad="32"/> <connect gate="G$1" pin="DOUBLE" pad="18"/> <connect gate="G$1" pin="D_VDD" pad="15"/> <connect gate="G$1" pin="D_VDD@1" pad="25"/> <connect gate="G$1" pin="FCTRL0" pad="16"/> <connect gate="G$1" pin="FCTRL1" pad="17"/> <connect gate="G$1" pin="GND" pad="12"/> <connect gate="G$1" pin="GND@1" pad="20"/> <connect gate="G$1" pin="GND@2" pad="22"/> <connect gate="G$1" pin="IN_VDD" pad="7"/> <connect gate="G$1" pin="IPSEL" pad="11"/> <connect gate="G$1" pin="LF" pad="36"/> <connect gate="G$1" pin="LOCK" pad="21"/> <connect gate="G$1" pin="PD_VDD" pad="3"/> <connect gate="G$1" pin="REG_VDD" pad="1"/> <connect gate="G$1" pin="RESET" pad="10"/> <connect gate="G$1" pin="SE_VDD" pad="23"/> <connect gate="G$1" pin="SKEW_EN" pad="19"/> <connect gate="G$1" pin="VCO" pad="33"/> <connect gate="G$1" pin="VCO_GND" pad="35"/> <connect gate="G$1" pin="VCO_VDD" pad="39"/> </connects> <technologies> <technology name=""> <attribute name="MF" value="" constant="no"/> <attribute name="MPN" value="GS4915INE3" constant="no"/> <attribute name="OC_FARNELL" value="1603770" constant="no"/> <attribute name="OC_NEWARK" value="12N2246" constant="no"/> </technology> </technologies> </device> </devices> </deviceset> <deviceset name="GS2970" prefix="IC"> <description>&lt;b&gt;3Gb/s, HD, SD SDI Receiver Complete with SMPTE Audio and Video Processing&lt;/b&gt;&lt;p&gt; Source: http://www.gennum.com/video/pdf/47478DOC.pdf</description> <gates> <gate name="G$1" symbol="GS2970" x="0" y="0"/> </gates> <devices> <device name="" package="LBGA100"> <connects> <connect gate="G$1" pin="!CS!_TMS" pad="F7"/> <connect gate="G$1" pin="!RC_BYP" pad="G3"/> <connect gate="G$1" pin="!RESET_TRSTIN" pad="C7"/> <connect gate="G$1" pin="!SDI" pad="D1"/> <connect gate="G$1" pin="!SDO" pad="K1"/> <connect gate="G$1" pin="!SMPTE_BYPASS" pad="G7"/> <connect gate="G$1" pin="20BIT/10BIT" pad="H7"/> <connect gate="G$1" pin="ACLK" pad="J4"/> <connect gate="G$1" pin="AMCLK" pad="K4"/> <connect gate="G$1" pin="AOUT_1/2" pad="J3"/> <connect gate="G$1" pin="AOUT_3/4" pad="K3"/> <connect gate="G$1" pin="AOUT_5/6" pad="J5"/> <connect gate="G$1" pin="AOUT_7/8" pad="K5"/> <connect gate="G$1" pin="AUDIO_EN/!DIS" pad="H3"/> <connect gate="G$1" pin="A_GND" pad="C2"/> <connect gate="G$1" pin="A_GND@1" pad="D2"/> <connect gate="G$1" pin="A_GND@2" pad="D3"/> <connect gate="G$1" pin="A_GND@3" pad="E3"/> <connect gate="G$1" pin="A_GND@4" pad="F3"/> <connect gate="G$1" pin="A_VDD" pad="B1"/> <connect gate="G$1" pin="BUFF_GND" pad="H2"/> <connect gate="G$1" pin="BUFF_VDD" pad="H1"/> <connect gate="G$1" pin="CORE_GND" pad="D5"/> <connect gate="G$1" pin="CORE_GND@1" pad="E5"/> <connect gate="G$1" pin="CORE_GND@2" pad="F5"/> <connect gate="G$1" pin="CORE_GND@3" pad="G5"/> <connect gate="G$1" pin="CORE_VDD" pad="D6"/> <connect gate="G$1" pin="CORE_VDD@1" pad="E6"/> <connect gate="G$1" pin="CORE_VDD@2" pad="F6"/> <connect gate="G$1" pin="CORE_VDD@3" pad="G6"/> <connect gate="G$1" pin="DOUT0" pad="K8"/> <connect gate="G$1" pin="DOUT1" pad="J8"/> <connect gate="G$1" pin="DOUT10" pad="E9"/> <connect gate="G$1" pin="DOUT11" pad="E10"/> <connect gate="G$1" pin="DOUT12" pad="C8"/> <connect gate="G$1" pin="DOUT13" pad="C10"/> <connect gate="G$1" pin="DOUT14" pad="C9"/> <connect gate="G$1" pin="DOUT15" pad="B10"/> <connect gate="G$1" pin="DOUT16" pad="B9"/> <connect gate="G$1" pin="DOUT17" pad="A10"/> <connect gate="G$1" pin="DOUT18" pad="A9"/> <connect gate="G$1" pin="DOUT19" pad="B8"/> <connect gate="G$1" pin="DOUT2" pad="K9"/> <connect gate="G$1" pin="DOUT3" pad="K10"/> <connect gate="G$1" pin="DOUT4" pad="J9"/> <connect gate="G$1" pin="DOUT5" pad="J10"/> <connect gate="G$1" pin="DOUT6" pad="H9"/> <connect gate="G$1" pin="DOUT7" pad="H10"/> <connect gate="G$1" pin="DOUT8" pad="F9"/> <connect gate="G$1" pin="DOUT9" pad="F10"/> <connect gate="G$1" pin="DVB_ASI" pad="G8"/> <connect gate="G$1" pin="IOPROC_EN/!DIS" pad="H8"/> <connect gate="G$1" pin="IO_GND" pad="B7"/> <connect gate="G$1" pin="IO_GND@1" pad="D9"/> <connect gate="G$1" pin="IO_GND@2" pad="G9"/> <connect gate="G$1" pin="IO_GND@3" pad="J7"/> <connect gate="G$1" pin="IO_VDD" pad="A7"/> <connect gate="G$1" pin="IO_VDD@1" pad="D10"/> <connect gate="G$1" pin="IO_VDD@2" pad="G10"/> <connect gate="G$1" pin="IO_VDD@3" pad="K7"/> <connect gate="G$1" pin="JTAG/!HOST" pad="D8"/> <connect gate="G$1" pin="LB_CONT" pad="A3"/> <connect gate="G$1" pin="LF" pad="A2"/> <connect gate="G$1" pin="PCLK" pad="A8"/> <connect gate="G$1" pin="PLL_GND" pad="D4"/> <connect gate="G$1" pin="PLL_GND@1" pad="E4"/> <connect gate="G$1" pin="PLL_GND@2" pad="F4"/> <connect gate="G$1" pin="PLL_VDD" pad="B2"/> <connect gate="G$1" pin="PLL_VDD@1" pad="C3"/> <connect gate="G$1" pin="PLL_VDD@2" pad="C4"/> <connect gate="G$1" pin="RSV" pad="B3"/> <connect gate="G$1" pin="RSV@1" pad="F2"/> <connect gate="G$1" pin="RSV@2" pad="G1"/> <connect gate="G$1" pin="RSV@3" pad="G2"/> <connect gate="G$1" pin="RSV@4" pad="G4"/> <connect gate="G$1" pin="SCLK_TCK" pad="F8"/> <connect gate="G$1" pin="SDI" pad="C1"/> <connect gate="G$1" pin="SDIN_TDIIN" pad="E8"/> <connect gate="G$1" pin="SDI_GND" pad="E2"/> <connect gate="G$1" pin="SDI_VDD" pad="E1"/> <connect gate="G$1" pin="SDO" pad="J1"/> <connect gate="G$1" pin="SDOUT_TDO" pad="E7"/> <connect gate="G$1" pin="SDO_EN/!DIS" pad="J2"/> <connect gate="G$1" pin="STANDBY" pad="K2"/> <connect gate="G$1" pin="STAT0" pad="A5"/> <connect gate="G$1" pin="STAT1" pad="A6"/> <connect gate="G$1" pin="STAT2" pad="B5"/> <connect gate="G$1" pin="STAT3" pad="B6"/> <connect gate="G$1" pin="STAT4" pad="C5"/> <connect gate="G$1" pin="STAT5" pad="C6"/> <connect gate="G$1" pin="SW_EN" pad="D7"/> <connect gate="G$1" pin="TERM" pad="F1"/> <connect gate="G$1" pin="TIM_861" pad="H5"/> <connect gate="G$1" pin="VBG" pad="A1"/> <connect gate="G$1" pin="VCO_GND" pad="B4"/> <connect gate="G$1" pin="VCO_VDD" pad="A4"/> <connect gate="G$1" pin="WCLK" pad="H4"/> <connect gate="G$1" pin="XTAL1" pad="K6"/> <connect gate="G$1" pin="XTAL2" pad="J6"/> <connect gate="G$1" pin="XTAL_OUT" pad="H6"/> </connects> <technologies> <technology name=""> <attribute name="MF" value="" constant="no"/> <attribute name="MPN" value="GS2970IBE3" constant="no"/> <attribute name="OC_FARNELL" value="1694478" constant="no"/> <attribute name="OC_NEWARK" value="56P5062" constant="no"/> </technology> </technologies> </device> </devices> </deviceset> </devicesets> </library> </drawing> </eagle>
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