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    Last update 1 week 4 days by Richard Ostertág
    FilesLTspice
    ..
    SYM
    LM386.lib
    Low pass PWM to audio filter.asc
    Low pass PWM to audio filter.plt
    audio_signal.pwl
    generate_PWM_signal.py
    pwm_signal.pwl
    		 
    LM386.lib
    *    ---------------------------------------------------------------
*    All models here must comform to the 8-pin DIP package ordering.
*    ---------------------------------------------------------------
*
*    ==============================
*    LM386 MODEL 1 -- Dave Dilatush
*    ==============================
*
.subckt LM386_DD1 g1 inn inp gnd out vs byp g8
* input emitter-follower buffers:
q1 gnd inn 10011 ddpnp
r1 inn gnd 50k
q2 gnd inp 10012 ddpnp
r2 inp gnd 50k
* differential input stage, gain-setting
* resistors, and internal feedback resistor:
q3 10013 10011 10008 ddpnp
q4 10014 10012 g1 ddpnp
r3 vs byp 15k
r4 byp 10008 15k
r5 10008 g8 150
r6 g8 g1 1.35k
r7 g1 out 15k
* input stage current mirror:
q5 10013 10013 gnd ddnpn
q6 10014 10013 gnd ddnpn
* voltage gain stage & rolloff cap:
q7 10017 10014 gnd ddnpn
c1 10014 10017 10pf
* current mirror source for gain stage:
i1 vs 10004 dc 5m
* Sziklai-connected push-pull output stage:
q10 10018 10017 10003 ddpnp
q11 10004 10004 10009 ddnpn 100
q12 10009 10009 10017 ddnpn 100
q13 vs 10004 10002 ddnpn 100
rup 10002 out .5
q14 10003 10018 gnd ddnpn 100
rdown out 10003 .5
* generic transistor models generated
* with MicroSim's PARTs utility, using
* default parameters except Bf:
.model ddnpn NPN(Is=10f Xti=3 Eg=1.11 Vaf=100
+ Bf=400 Ise=0 Ne=1.5 Ikf=0 Nk=.5 Xtb=1.5 Var=100
+ Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=2p Mjc=.3333
+ Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n
+ Tf=1n Itf=1 Xtf=0 Vtf=10)
.model ddpnp PNP(Is=10f Xti=3 Eg=1.11 Vaf=100
+ Bf=200 Ise=0 Ne=1.5 Ikf=0 Nk=.5 Xtb=1.5 Var=100
+ Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=2p Mjc=.3333
+ Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n
+ Tf=1n Itf=1 Xtf=0 Vtf=10)
.ends
*
*
*    ==============================
*    LM386 MODEL 2 -- Dave Dilatush
*    ==============================
*
.subckt LM386_DD2 g1 inn inp gnd out vs byp g8
* input emitter-follower buffers:
q1 gnd inn 10011 ddpnp
r1 inn gnd 50k
q2 gnd inp 10012 ddpnp
r2 inp gnd 50k
* differential input stage, gain-setting
* resistors, and internal feedback resistor:
q3 10013 10011 10008 ddpnp
q4 10014 10012 g1 ddpnp
r3 vs byp 15k
r4 byp 10008 15k
r5 10008 g8 150
r6 g8 g1 1.35k
r7 g1 out 15k
* input stage current mirror:
q5 10013 10013 gnd ddnpn 1.1
q6 10014 10013 gnd ddnpn  
* voltage gain stage & rolloff cap:
* m was 1
q7 10017 10014 gnd ddnpn 10
c1 10014 10017 15pf
* current mirror source for gain stage:
i1 10002 vs dc 5m
q8 10004 10002 vs ddpnp
q9 10002 10002 vs ddpnp
* Sziklai-connected push-pull output stage:
* m=10 for q10
q10 10018 10017 out ddpnp 10
q11 10004 10004 10009 ddnpn 100
q12 10009 10009 10017 ddnpn 100
q13 vs 10004 out ddnpn 100
q14 out 10018 gnd ddnpn 100
* generic transistor models generated
* with MicroSim's PARTs utility, using
* default parameters except Bf:
* BF was 400, Is=10f
.model ddnpn NPN(Is=10f Xti=3 Eg=1.11 Vaf=100
+ Bf=150 Ise=0 Ne=1.5 Ikf=0 Nk=.5 Xtb=1.5 Var=100
+ Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=2p Mjc=.3333
+ Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n
+ Tf=1n Itf=1 Xtf=0 Vtf=10)
* BF was 200, Tf=1n, Tr=10n, Is=10f
.model ddpnp PNP(Is=10f Xti=3 Eg=1.11 Vaf=100
+ Bf=40 Ise=0 Ne=1.5 Ikf=0 Nk=.5 Xtb=1.5 Var=100
+ Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=2p Mjc=.3333
+ Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=100n
+ Tf=10n Itf=1 Xtf=0 Vtf=10)
.ends
*
*
*    =====================================================
*    Source File: LM386Blk.asc
*    Developer: ETech (eetech00@yahoo.com)
*    Created: Feb 28 2016
*    Revision: NA
*
*    This TI LM386 spice model has
*    been tested with LTSpice. Temperature is not modeled.
*    =====================================================
*
* block symbol definitions
.subckt LM386_TI G1 INN INP DGND OUT VS BYPASS G8
Q3 N011 N011 DGND 0 NP .2
Q2 N011 N009 N004 0 PN .2
Q1 DGND INN N009 0 PN .2
R1 INN DGND 50k
Q4 N007 N011 DGND 0 NP .2
R2 G1 G8 1.35k
Q5 N007 N010 G1 0 PN .2
Q6 DGND INP N010 0 PN .2
R3 INP DGND 50k
Q7 N008 N007 DGND 0 NP .2
Q8 N006 N012 DGND 0 NP 20
C1 N008 N007 10p
Q9 N012 N008 N006 0 PN .2
R4 OUT N006 0.5
R5 N003 OUT 0.5
R6 OUT G1 15k
Q10 VS N002 N003 0 NP 20
Q11 N002 N001 VS 0 PN .2
R7 BYPASS N004 15k
R8 N001 BYPASS 15k
QD2 N002 N002 N005 0 NP 20
R9 N001 DGND 3400
R10 G8 N004 150
Q12 N001 N001 VS 0 PN .2
QD1 N005 N005 N008 0 NP 20
*
* generic transistor models generated
* with MicroSim's PARTs utility, using
* default parameters except Bf.
* (but default parameters do not match LTspice defaults): 
.model NP NPN(Is=10f Xti=3 Eg=1.11 Vaf=100
+ Bf=400 Ise=0 Ne=1.5 Ikf=0 Nk=.5 Xtb=1.5 Var=100
+ Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=2p Mjc=.3333
+ Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n
+ Tf=1n Itf=1 Xtf=0 Vtf=10)
.model PN PNP(Is=10f Xti=3 Eg=1.11 Vaf=100
+ Bf=200 Ise=0 Ne=1.5 Ikf=0 Nk=.5 Xtb=1.5 Var=100
+ Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=2p Mjc=.3333
+ Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n
+ Tf=1n Itf=1 Xtf=0 Vtf=10)
.ends LM386
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