Libre Space Foundation / SIDLOC Transceiver - History

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    Fix small silkscreen clarity issues
    by Papadeas Pierros 3 years 2 months
    Fix small silkscreen clarity issues

    Signed-off-by: Papadeas Pierros <pierros@papadeas.gr>
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    077a05bc
    Add silkscreen
    by A zisi 3 years 2 months
    Add silkscreen

    Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
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    fa98f4d2
    Update in PCB from sidloc schematic
    by A zisi 3 years 2 months
    Update in PCB from sidloc schematic

    * Change SPI CLK of FPGA to L18
    * Fixes #44 and #45

    Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
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    8fc3b2df
    Route power of FPGA and finalize I/Q connections
    by A zisi 3 years 2 months
    Route power of FPGA and finalize I/Q connections

    * Fixes #29 and #31
    * Add TP in VIN 3.3V from external

    Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
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    aa2a8d58
    Add debug LED for FPGA in PCB
    by A zisi 3 years 3 months
    Add debug LED for FPGA in PCB

    Fixes #42

    Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
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    Files
    ecf17cc8
    Add SPI routing of FPGA
    by A zisi 3 years 3 months
    Add SPI routing of FPGA

    * Route pull-up resistors of NOR flash
    * Small fixes in AT86RF215, fixes #30
    * Route pull-up and down resistors of JTAG

    Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
    Changes
    Files
    65c1553f
    Route AT86RF215M, fixes #30
    by A zisi 3 years 3 months
    Route AT86RF215M, fixes #30

    Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
    Changes
    Files
    d22b3f58
    Fix SPI_CLK connection
    by A zisi 3 years 3 months
    Fix SPI_CLK connection

    It had connected to CS

    Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
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    Files
    961e955d
    Place and route NOR flash
    by A zisi 3 years 3 months
    Place and route NOR flash

    Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
    Changes
    Files
    1230dde0
    Define stack-up and manufacturer rules
    by A zisi 3 years 3 months
    Define stack-up and manufacturer rules

    * Define also net classes and pre-define traces and vias
    * Fixes #2

    Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
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    12dd47cf
    Report a bug