Libre Space Foundation / SIDLOC Transceiver - History

Fixes in power part, #54 and #64

by A zisi 3 years 23 hours

Fixes in power part, #54 and #64

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Changes

Files

9efb3758

Add missing via in core power supply

by A zisi 3 years 2 months

Add missing via in core power supply

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Changes

Files

bb140174

Update BOM and create iBOM

by A zisi 3 years 2 months

Update BOM and create iBOM

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Changes

Files

6780198d

Fix mask leyer clearance

by A zisi 3 years 2 months

Fix mask leyer clearance

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Changes

Files

5f59684c

Add more vias in power planes

by A zisi 3 years 2 months

Add more vias in power planes

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Changes

Files

ca58d73e

Fix TPS22950 footprint

by A zisi 3 years 2 months

Fix TPS22950 footprint

Add the correct one for LSF-KiCAD library

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Changes

Files

538108bb

Fix via in pad in JTAG connector

by A zisi 3 years 2 months

Fix via in pad in JTAG connector

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Changes

Files

f97d888e

Add in-series resistors in FPGA-SPI

by A zisi 3 years 2 months

Add in-series resistors in FPGA-SPI

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Changes

Files

cc07c234

Fix clock-in in FPGA pins

by A zisi 3 years 2 months

Fix clock-in in FPGA pins

Fixes #28

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Changes

Files

77dad4e1

Fix CLK test point

by A zisi 3 years 2 months

Fix CLK test point

Remove unterminated length to TP.

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Changes

Files

5f79558c