Libre Space Foundation / SIDLOC Transceiver - History

Migrate to KiCad 7, fixes #82

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Small fixes before fabrication

* Remove solder paste from FPGA footprint, fixes #68
* Align pin 1 of PQ9ish connector and grid origin with a fix point,
fixes #67
* Reduce PCB page size to A5, fixes #66
* Generate iBOM, fixes #48

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Fix the position of B2B connector

* Small routing fixes in power section
* Remove wire to board connector from PCB

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Update FPGA 2V5 LDO routing

Signed-off-by: Dimitrios Moustroufis <dimoustroufis@gmail.com>

Change FPGA 2V5 LDO to the bigger footprint variant.

Signed-off-by: Dimitrios Moustroufis <dimoustroufis@gmail.com>

Add B2B connector

Fixes #62

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Fix net names, PN and add connector for FE

Fixes #57, #56, #58, #59, #52, #65

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Add LSF logo and fix egde GND via

Fixes #50, #51

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Fixes in power part, #54 and #64

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>

Add missing via in core power supply

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>