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User Library-SOIC_N-R8.SLDPRT
User Library-SOIC_N-R8.step
User Library-SOIC_N-R8.stepISO-10303-21;
HEADER;
FILE_DESCRIPTION (( 'STEP AP214' ),
    '1' );
FILE_NAME ('User Library-SOIC_N-R8.STEP',
    '2017-12-19T13:53:31',
    ( '' ),
    ( '' ),
    'SwSTEP 2.0',
    'SolidWorks 2018',
    '' );
FILE_SCHEMA (( 'AUTOMOTIVE_DESIGN' ));
ENDSEC;

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Usama Bashir / dummy test - Files

Files

hardware / 1v0 / PCB / LimeSDR_Mini_1v0_Rounded.PcbDoc

hardware / 1v0 / PCB / LimeSDR_Mini_1v0_Rounded_panel.PcbDoc

hardware / 1v0 / Schematics / 01_BlockDiagram.SchDoc

hardware / 1v0 / Schematics / 02_PowerDiagram.SchDoc

hardware / 1v0 / Schematics / 03_ClockDiagram.SchDoc

hardware / 1v0 / Schematics / 04_LMS7002M_Misc.SchDoc

hardware / 1v0 / Schematics / 05_LMS7002M_RF.SchDoc

hardware / 1v0 / Schematics / 06_LMS7002M_Power.SchDoc

hardware / 1v0 / Schematics / 07_FPGA.SchDoc

hardware / 1v0 / Schematics / 08_USB3_0_device.SchDoc

hardware / 1v0 / Schematics / 09_Misc.SchDoc

hardware / 1v1 / PCB / LimeSDR_Mini_1v1_Rounded.PcbDoc

hardware / 1v1 / PCB / LimeSDR_Mini_1v1_Rounded_panel.PcbDoc

hardware / 1v1 / PCB / LimeSDR_Mini_1v1_Rounded_soldermask.PcbDoc

hardware / 1v1 / Schematics / 01_BlockDiagram.SchDoc

hardware / 1v1 / Schematics / 02_PowerDiagram.SchDoc

hardware / 1v1 / Schematics / 03_ClockDiagram.SchDoc

hardware / 1v1 / Schematics / 04_LMS7002M_Misc.SchDoc

hardware / 1v1 / Schematics / 05_LMS7002M_RF.SchDoc

hardware / 1v1 / Schematics / 06_LMS7002M_Power.SchDoc

hardware / 1v1 / Schematics / 07_FPGA.SchDoc

hardware / 1v1 / Schematics / 08_USB3_0_device.SchDoc

hardware / 1v1 / Schematics / 09_Misc.SchDoc

hardware / 1v2 / PCB / LimeSDR_Mini_1v2_Rounded.PcbDoc

hardware / 1v2 / PCB / LimeSDR_Mini_1v2_Rounded_panel.PcbDoc

hardware / 1v2 / Schematics / 01_BlockDiagram.SchDoc

hardware / 1v2 / Schematics / 02_PowerDiagram.SchDoc

hardware / 1v2 / Schematics / 03_ClockDiagram.SchDoc

hardware / 1v2 / Schematics / 04_LMS7002M_Misc.SchDoc

hardware / 1v2 / Schematics / 05_LMS7002M_RF.SchDoc

hardware / 1v2 / Schematics / 06_LMS7002M_Power.SchDoc

hardware / 1v2 / Schematics / 07_FPGA.SchDoc

hardware / 1v2 / Schematics / 08_USB3_0_device.SchDoc

hardware / 1v2 / Schematics / 09_Misc.SchDoc

hardware / 1v3 / PCB / LimeSDR_Mini_1v3_Rounded.PcbDoc

hardware / 1v3 / PCB / LimeSDR_Mini_1v3_Rounded_old.PcbDoc

hardware / 1v3 / PCB / LimeSDR_Mini_1v3_Rounded_panel.PcbDoc

hardware / 1v3 / Schematics / 01_BlockDiagram.SchDoc

hardware / 1v3 / Schematics / 02_PowerDiagram.SchDoc

hardware / 1v3 / Schematics / 03_ClockDiagram.SchDoc

hardware / 1v3 / Schematics / 04_LMS7002M_Misc.SchDoc

hardware / 1v3 / Schematics / 05_LMS7002M_RF.SchDoc

hardware / 1v3 / Schematics / 06_LMS7002M_Power.SchDoc

hardware / 1v3 / Schematics / 07_FPGA.SchDoc

hardware / 1v3 / Schematics / 08_USB3_0_device.SchDoc

hardware / 1v3 / Schematics / 09_Misc.SchDoc
