Files
Scanning the repository...
Last update 5 years 9 months
by Afonso Muralha
| FilesPCB ESP32Control_BoardProject Outputs for Control_Board | |
|---|---|
| .. | |
| Control_Board.nsx | |
| Control_Board.sim | |
| Design Rule Check - Control_Board.drc | |
| Design Rule Check - Control_Board.html | |
| Status Report.Txt |
Status Report.TxtOutput: Mixed Sim Type : AdvSimNetlist From : Project [Control_Board.PrjPcb] Generated File[Control_Board.nsx] Files Generated : 1 Documents Printed : 0 Finished Output Generation At 00:38:19 On 26/01/2019