Preliminary floorplanning of analog/optical compon...
by alexg-jpg 4 years 6 months
Preliminary floorplanning of analog/optical components including passives
Added extra footprint libraries provided by kicad....
by alexg-jpg 4 years 6 months
Added extra footprint libraries provided by kicad. Associated footprints with symbols in schematic
Added labels around VCSEL. Rset is now 3.3kOhms
by alexg-jpg 4 years 6 months
Resolved some ERC violations
by alexg-jpg 4 years 6 months
Deleted extra connections for global labels on DFF
by alexg-jpg 4 years 6 months
Replaced labels that weren't fixed in my previous ...
by alexg-jpg 4 years 6 months
Replaced labels that weren't fixed in my previous commit
Update power regulator
by Yinxin He 4 years 6 months
change the library of NAND gate
by 李明月 4 years 6 months
Reverted to e16d532
by alexg-jpg 4 years 6 months
change clock of prbs checker to be from cdr output...
by 李明月 4 years 6 months
change clock of prbs checker to be from cdr output, change vcc to 3.3v_digital
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