Capstone Team / Transceiver - History

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    Resolved merge conflicts with master
    by alexg-jpg 3 years 9 months
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    0962d0e1
    Update power regulator
    by Yinxin He 3 years 9 months
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    f9f23dcf
    Merge branch 'master' of https://git.cadlab.io/Capstone-Team/test-project
    by Yinxin He 3 years 9 months
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    2d7034ad
    Change local library references
    by Yinxin He 3 years 9 months
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    c63d2f29
    change the library of NAND gate
    by 李明月 3 years 9 months
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    5d43aba0
    Import footprint for resistors
    by Yinxin He 3 years 9 months
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    9d3dc857
    Merge branch 'master' of https://git.cadlab.io/Capstone-Team/test-project
    by Yinxin He 3 years 9 months
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    b1af5d25
    Reverted to e16d532
    by alexg-jpg 3 years 9 months
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    ed8538e7
    Merge branch 'master' of https://git.cadlab.io/Capstone-Team/test-project
    by 李明月 3 years 9 months
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    f3754fa5
    change clock of prbs checker to be from cdr output, change vcc to 3.3v_digital
    by 李明月 3 years 9 months
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    e16d5325
    Report a bug