Added missing caps in schematic. Regenerated netlist. Completed first iteration of layout for analog/optical

Flipped power and microcontroller to other side of PCB

Preliminary floorplanning of analog/optical components including passives

Added extra footprint libraries provided by kicad. Associated footprints with symbols in schematic

Added labels around VCSEL. Rset is now 3.3kOhms

Updated preliminary floorplan

Resolved some ERC violations

Deleted extra connections for global labels on DFF

Replaced labels that weren't fixed in my previous commit

Resolved merge conflicts with AlexWorkspace