supply-custom.lbr
<?xml version="1.0" encoding="utf-8"?>
<!DOCTYPE eagle SYSTEM "eagle.dtd">
<eagle version="9.5.2">
<drawing>
<settings>
<setting alwaysvectorfont="no"/>
<setting verticaltext="up"/>
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<packages>
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<text x="-1.27" y="1.27" size="1.778" layer="96">&gt;VALUE</text>
<pin name="+1V0_FPGA" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/>
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<text x="-1.27" y="1.27" size="1.778" layer="96">&gt;VALUE</text>
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<text x="-1.27" y="1.27" size="1.778" layer="96">&gt;VALUE</text>
<pin name="+1V5" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/>
</symbol>
<symbol name="+1V8">
<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/>
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<text x="-1.27" y="1.27" size="1.778" layer="96">&gt;VALUE</text>
<pin name="+1V8" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/>
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<symbol name="+2V5">
<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/>
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<text x="-1.27" y="1.27" size="1.778" layer="96">&gt;VALUE</text>
<pin name="+2V5" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/>
</symbol>
<symbol name="+3V3A">
<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/>
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<text x="-1.27" y="1.27" size="1.778" layer="96">&gt;VALUE</text>
<pin name="+3V3A" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/>
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<symbol name="-2V5A">
<wire x1="-1.27" y1="1.905" x2="0" y2="0" width="0.254" layer="94"/>
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<text x="-1.27" y="-2.54" size="1.778" layer="96">&gt;VALUE</text>
<pin name="-2V5A" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/>
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<text x="-2.54" y="-2.54" size="1.778" layer="96">&gt;VALUE</text>
<pin name="GND" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/>
</symbol>
<symbol name="+5V0_UNREG">
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<text x="-1.27" y="1.27" size="1.778" layer="96">&gt;VALUE</text>
<pin name="+5V0_UNREG" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/>
</symbol>
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<gate name="G$1" symbol="+1V0" x="0" y="2.54"/>
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<devices>
<device name="">
<technologies>
<technology name=""/>
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</device>
</devices>
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<deviceset name="+1V0_FPGA">
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<gate name="G$1" symbol="+1V0_FPGA" x="0" y="2.54"/>
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<devices>
<device name="">
<technologies>
<technology name=""/>
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<deviceset name="+1V5">
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<gate name="G$1" symbol="+1V5" x="0" y="2.54"/>
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<devices>
<device name="">
<technologies>
<technology name=""/>
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<deviceset name="+1V8">
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<gate name="G$1" symbol="+1V8" x="0" y="2.54"/>
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<devices>
<device name="">
<technologies>
<technology name=""/>
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<deviceset name="+2V5">
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<gate name="G$1" symbol="+2V5" x="0" y="2.54"/>
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<devices>
<device name="">
<technologies>
<technology name=""/>
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<deviceset name="+3V3A">
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<gate name="G$1" symbol="+3V3A" x="0" y="2.54"/>
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<devices>
<device name="">
<technologies>
<technology name=""/>
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<deviceset name="-2V5A">
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<gate name="G$1" symbol="-2V5A" x="0" y="-2.54"/>
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<devices>
<device name="">
<technologies>
<technology name=""/>
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<deviceset name="GND">
<gates>
<gate name="G$1" symbol="GND" x="0" y="-2.54"/>
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<devices>
<device name="">
<technologies>
<technology name=""/>
</technologies>
</device>
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<deviceset name="+5V0_UNREG">
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<gate name="G$1" symbol="+5V0_UNREG" x="0" y="2.54"/>
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<device name="">
<technologies>
<technology name=""/>
</technologies>
</device>
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</drawing>
</eagle>