applet.video.rgb_input: exclude frame from FSM but not subtarget reset. This means that frame skip is detected correctly but the subtarget is still completely reset and starts from frame 0.
by whitequark 6 years 2 months
e53e8e2f
gateware.fx2: re-register FX2 outputs. (UPDATE FIRMWARE.) Before this commit, the FX2 arbiter would incorrectly use FX2 outputs in the fabric that were actually only valid for 1/2 of IFCLK period, because they were DDR input signals. After this commit, these signals are correctly re-registered in fabric so that they are valid for an entire IFCLK period, increasing latency by one cycle. Fixes #89.
by whitequark 6 years 2 months
684e4580
applet.memory.25x: lazily dump hex data.
by whitequark 6 years 2 months
efc321cb
applet.interface.spi_master: lazily dump hex data.
by whitequark 6 years 2 months
ed609c74
firmware: use PF instead of EF/FF and INFM1/OEP1. "NFCI." This allows us greater freedom in changing the latency of the FX2 arbiter for IN and OUT transfers alike. This is a fairly significant change that could lead to corruption of data in transit and hangs, but it seems OK based on testing with the following applets: * benchmark * memory-25x * video-rgb-input Also, gruetzkopf has verified this according to documentation and silicon behavior and it also appears fully equivalent.
by whitequark 6 years 2 months
e5f9ea99
applet.interface.spi_master: use ClockGen. This makes clear the limitations of the current SERDES engine (i.e. that the maximum clock rate is 1/4 of applet clock) and handles edge conditions reliably. It could also enable higher rates in the future.
by whitequark 6 years 2 months
cf47a3a9
gateware.clockgen, applet: fix typos.
by whitequark 6 years 2 months
b9066317
protocol.vgm: add YMF262 support.
by whitequark 6 years 2 months
2f1743a4
applet.audio.yamaha_opl: parameterize over specific Yamaha chip. Currently only OPL2 and OPL are supported. OPL has not been tested on real hardware, but is virtually certain to work.
by whitequark 6 years 2 months
cdd55d30
applet.audio.yamaha_opl: separate CPU and DAC buses. NFC. This helps to make clear the distinction between these interfaces, which are essentially unrelated and not synchronized. Also, some chips, like OPL3, have dual DAC outputs. (Really quad, but dual electrically.)
by whitequark 6 years 2 months
50ce60b6
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