Files
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/ analog-inputs.sch
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/ analog-outputs-sensitec.sch
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/ analog-outputs-voltage-sensitec.sch
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/ analog-outputs-voltage.sch
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/ analog-outputs.sch
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/ current-source-analog-side.sch
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/ digital-inputs.sch
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/ digital-outpus-general.sch
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/ digital-outputs-general.sch
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/ digital-outputs.sch
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/ digital-poti.sch
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/ display-device.sch
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/ ethernet-expansion.sch
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/ power-supply.sch
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/ tnsy-test-board.kicad_pcb
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/ tnsy-test-board.sch
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/ voltage-source.sch
Last update 3 years 7 months
by
Marko Bosnjak
tnsy-test-board.proupdate=Pon 03 Kol 2020 19:10:58 version=1 last_client=kicad [general] version=1 RootSch= BoardNm= [pcbnew] version=1 LastNetListRead= UseCmpFile=1 PadDrill=0.600000000000 PadDrillOvalY=0.600000000000 PadSizeH=1.500000000000 PadSizeV=1.500000000000 PcbTextSizeV=1.500000000000 PcbTextSizeH=1.500000000000 PcbTextThickness=0.300000000000 ModuleTextSizeV=1.000000000000 ModuleTextSizeH=1.000000000000 ModuleTextSizeThickness=0.150000000000 SolderMaskClearance=0.000000000000 SolderMaskMinWidth=0.000000000000 DrawSegmentWidth=0.200000000000 BoardOutlineThickness=0.100000000000 ModuleOutlineThickness=0.150000000000 [cvpcb] version=1 NetIExt=net [eeschema] version=1 LibDir= [eeschema/libraries] [schematic_editor] version=1 PageLayoutDescrFile= PlotDirectoryName= SubpartIdSeparator=0 SubpartFirstId=65 NetFmtName= SpiceAjustPassiveValues=0 LabSize=50 ERC_TestSimilarLabels=1