vivado.log
#-----------------------------------------------------------
# Vivado v2018.3 (64-bit)
# SW Build 2405991 on Thu Dec  6 23:36:41 MST 2018
# IP Build 2404404 on Fri Dec  7 01:43:56 MST 2018
# Start of session at: Fri Aug 30 14:39:31 2019
# Process ID: 27607
# Current directory: /data/cms/ecal/fe/FEM_Monacal_v0/hardware
# Command line: vivado
# Log file: /data/cms/ecal/fe/FEM_Monacal_v0/hardware/vivado.log
# Journal file: /data/cms/ecal/fe/FEM_Monacal_v0/hardware/vivado.jou
#-----------------------------------------------------------
start_gui
open_project /data/cms/ecal/fe/fead_v2/firmware/FEAD.xpr
Scanning sources...
Finished scanning sources
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/data/Xilinx/Vivado/2018.3/data/ip'.
WARNING: [IP_Flow 19-5178] IP tri_mode_ethernet_mac_0 will not be generated with lower license level. If you would like to generate with the current available license levels, please reset and regenerate.
open_project: Time (s): cpu = 00:00:16 ; elapsed = 00:00:08 . Memory (MB): peak = 6606.789 ; gain = 143.723 ; free physical = 313 ; free virtual = 44511
update_compile_order -fileset sources_1
reset_run synth_1
launch_runs impl_1 -to_step write_bitstream -jobs 2
[Fri Aug 30 14:44:26 2019] Launched synth_1...
Run output will be captured here: /data/cms/ecal/fe/fead_v2/firmware/FEAD.runs/synth_1/runme.log
[Fri Aug 30 14:44:26 2019] Launched impl_1...
Run output will be captured here: /data/cms/ecal/fe/fead_v2/firmware/FEAD.runs/impl_1/runme.log
reset_run synth_1
launch_runs impl_1 -to_step write_bitstream -jobs 2
[Fri Aug 30 14:47:20 2019] Launched synth_1...
Run output will be captured here: /data/cms/ecal/fe/fead_v2/firmware/FEAD.runs/synth_1/runme.log
[Fri Aug 30 14:47:20 2019] Launched impl_1...
Run output will be captured here: /data/cms/ecal/fe/fead_v2/firmware/FEAD.runs/impl_1/runme.log
write_cfgmem  -format mcs -size 4 -interface SPIx1 -loadbit {up 0x00000000 "/data/cms/ecal/fe/fead_v2/firmware/FEAD.runs/impl_1/FEAD.bit" } -file "/data/cms/ecal/fe/fead_v2/firmware/FEAD.mcs/FEAD_2019083001_SEU_tests.mcs"
Command: write_cfgmem -format mcs -size 4 -interface SPIx1 -loadbit {up 0x00000000 "/data/cms/ecal/fe/fead_v2/firmware/FEAD.runs/impl_1/FEAD.bit" } -file /data/cms/ecal/fe/fead_v2/firmware/FEAD.mcs/FEAD_2019083001_SEU_tests.mcs
Creating config memory files...
Creating bitstream load up from address 0x00000000
Loading bitfile /data/cms/ecal/fe/fead_v2/firmware/FEAD.runs/impl_1/FEAD.bit
Writing file /data/cms/ecal/fe/fead_v2/firmware/FEAD.mcs/FEAD_2019083001_SEU_tests.mcs
Writing log file /data/cms/ecal/fe/fead_v2/firmware/FEAD.mcs/FEAD_2019083001_SEU_tests.prm
===================================
Configuration Memory information
===================================
File Format        MCS
Interface          SPIX1
Size               4M
Start Address      0x00000000
End Address        0x003FFFFF

Addr1         Addr2         Date                    File(s)
0x00000000    0x002DF2FB    Aug 30 14:56:30 2019    /data/cms/ecal/fe/fead_v2/firmware/FEAD.runs/impl_1/FEAD.bit
0 Infos, 0 Warnings, 0 Critical Warnings and 0 Errors encountered.
write_cfgmem completed successfully
open_hw
connect_hw_server -url localhost:3121
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
INFO: [Labtools 27-2222] Launching hw_server...
INFO: [Labtools 27-2221] Launch Output:

****** Xilinx hw_server v2018.3
  **** Build date : Dec  6 2018-23:53:53
    ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.


current_hw_target [get_hw_targets */xilinx_tcf/Xilinx/000018cd399501]
disconnect_hw_server localhost:3121
connect_hw_server -url localhost:3121
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
current_hw_target [get_hw_targets */xilinx_tcf/Xilinx/000018cd399501]
set_property PARAM.FREQUENCY 12000000 [get_hw_targets */xilinx_tcf/Xilinx/000018cd399501]
open_hw_target
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Xilinx/000018cd399501
set_property PROGRAM.FILE {/data/cms/ecal/fe/fead_v2/firmware/FEAD.bit/FEAD_2019082901_SEU_tests.bit} [get_hw_devices xc7k70t_0]
current_hw_device [get_hw_devices xc7k70t_0]
refresh_hw_device -update_hw_probes false [lindex [get_hw_devices xc7k70t_0] 0]
INFO: [Labtools 27-1434] Device xc7k70t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
create_hw_cfgmem -hw_device [get_hw_devices xc7k70t_0] -mem_dev [lindex [get_cfgmem_parts {is25lp032d-spi-x1_x2_x4}] 0]
set_property PROBES.FILE {} [get_hw_devices xc7k70t_0]
set_property FULL_PROBES.FILE {} [get_hw_devices xc7k70t_0]
set_property PROGRAM.FILE {/data/cms/ecal/fe/fead_v2/firmware/FEAD.runs/impl_1/FEAD.bit} [get_hw_devices xc7k70t_0]
program_hw_devices [get_hw_devices xc7k70t_0]
INFO: [Labtools 27-3164] End of startup status: HIGH
refresh_hw_device [lindex [get_hw_devices xc7k70t_0] 0]
INFO: [Labtools 27-1434] Device xc7k70t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
exit
INFO: [Common 17-206] Exiting Vivado at Tue Sep  3 14:20:13 2019...