matt0930 / iMX6 Rex V1I1 for AD2014 - Files

iMX6 Rex_V1I1.PrjPcbStructure
Record=TopLevelDocument|FileName=iMX6 Rex_V1I1 Project.SchDoc
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[01] - COVER PAGE.SchDoc|SchDesignator=[01] - COVER PAGE.SchDoc|FileName=[01] - COVER PAGE.SchDoc|SymbolType=Normal|RawFileName=[01] - COVER PAGE.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[02] - BLOCK DIAGRAM.SchDoc|SchDesignator=[02] - BLOCK DIAGRAM.SchDoc|FileName=[02] - BLOCK DIAGRAM.SchDoc|SymbolType=Normal|RawFileName=[02] - BLOCK DIAGRAM.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[03] - CONNECTORS.SchDoc|SchDesignator=[03] - CONNECTORS.SchDoc|FileName=[03] - CONNECTORS.SchDoc|SymbolType=Normal|RawFileName=[03] - CONNECTORS.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[04] - CPU - DDR3, DDR3 MEM.SchDoc|SchDesignator=[04] - CPU - DDR3, DDR3 MEM.SchDoc|FileName=[04] - CPU - DDR3, DDR3 MEM.SchDoc|SymbolType=Normal|RawFileName=[04] - CPU - DDR3, DDR3 MEM.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[05] - CPU - PCIE, SATA.SchDoc|SchDesignator=[05] - CPU - PCIE, SATA.SchDoc|FileName=[05] - CPU - PCIE, SATA.SchDoc|SymbolType=Normal|RawFileName=[05] - CPU - PCIE, SATA.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[06] - CPU - HDMI, LVDS.SchDoc|SchDesignator=[06] - CPU - HDMI, LVDS.SchDoc|FileName=[06] - CPU - HDMI, LVDS.SchDoc|SymbolType=Normal|RawFileName=[06] - CPU - HDMI, LVDS.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[07] - CPU - USB, ETHERNET.SchDoc|SchDesignator=[07] - CPU - USB, ETHERNET.SchDoc|FileName=[07] - CPU - USB, ETHERNET.SchDoc|SymbolType=Normal|RawFileName=[07] - CPU - USB, ETHERNET.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[08] - CPU - SPI, I2C, SD, MMC.SchDoc|SchDesignator=[08] - CPU - SPI, I2C, SD, MMC.SchDoc|FileName=[08] - CPU - SPI, I2C, SD, MMC.SchDoc|SymbolType=Normal|RawFileName=[08] - CPU - SPI, I2C, SD, MMC.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[09] - CPU - UART, AUDIO.SchDoc|SchDesignator=[09] - CPU - UART, AUDIO.SchDoc|FileName=[09] - CPU - UART, AUDIO.SchDoc|SymbolType=Normal|RawFileName=[09] - CPU - UART, AUDIO.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[10] - CPU - JTAG, CONTROL.SchDoc|SchDesignator=[10] - CPU - JTAG, CONTROL.SchDoc|FileName=[10] - CPU - JTAG, CONTROL.SchDoc|SymbolType=Normal|RawFileName=[10] - CPU - JTAG, CONTROL.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[11] - CPU - POWER.SchDoc|SchDesignator=[11] - CPU - POWER.SchDoc|FileName=[11] - CPU - POWER.SchDoc|SymbolType=Normal|RawFileName=[11] - CPU - POWER.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[12] - CPU - UNUSED.SchDoc|SchDesignator=[12] - CPU - UNUSED.SchDoc|FileName=[12] - CPU - UNUSED.SchDoc|SymbolType=Normal|RawFileName=[12] - CPU - UNUSED.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[13] - ETHERNET PHY.SchDoc|SchDesignator=[13] - ETHERNET PHY.SchDoc|FileName=[13] - ETHERNET PHY.SchDoc|SymbolType=Normal|RawFileName=[13] - ETHERNET PHY.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[14] - SPI FLASH, LEDS.SchDoc|SchDesignator=[14] - SPI FLASH, LEDS.SchDoc|FileName=[14] - SPI FLASH, LEDS.SchDoc|SymbolType=Normal|RawFileName=[14] - SPI FLASH, LEDS.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[15] - PWR 3V3, 1V375.SchDoc|SchDesignator=[15] - PWR 3V3, 1V375.SchDoc|FileName=[15] - PWR 3V3, 1V375.SchDoc|SymbolType=Normal|RawFileName=[15] - PWR 3V3, 1V375.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[16] - PWR 2V5, 1V5.SchDoc|SchDesignator=[16] - PWR 2V5, 1V5.SchDoc|FileName=[16] - PWR 2V5, 1V5.SchDoc|SymbolType=Normal|RawFileName=[16] - PWR 2V5, 1V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[17] - MECH.SchDoc|SchDesignator=[17] - MECH.SchDoc|FileName=[17] - MECH.SchDoc|SymbolType=Normal|RawFileName=[17] - MECH.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[18] - POWER SEQUENCING.SchDoc|SchDesignator=[18] - POWER SEQUENCING.SchDoc|FileName=[18] - POWER SEQUENCING.SchDoc|SymbolType=Normal|RawFileName=[18] - POWER SEQUENCING.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID= 
Record=SheetSymbol|Record=SheetSymbol|SourceDocument=iMX6 Rex_V1I1 Project.SchDoc|Designator=[19] - DOC REVISION HISTORY.SchDoc|SchDesignator=[19] - DOC REVISION HISTORY.SchDoc|FileName=[19] - DOC REVISION HISTORY.SchDoc|SymbolType=Normal|RawFileName=[19] - DOC REVISION HISTORY.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=