Files
-
hardware / rev0 / debug_control_connections.sch
-
hardware / rev0 / fpga_configuration.sch
-
hardware / rev0 / host_side.sch
-
hardware / rev0 / luna_rev0.kicad_pcb
-
hardware / rev0 / luna_rev0.sch
-
hardware / rev0 / power_supplies.sch
-
hardware / rev0 / ram_section.sch
-
hardware / rev0 / right_side_indicators.sch
-
hardware / rev0 / sideband_side.sch
-
hardware / rev0 / target_side.sch
Last update 4 years 3 months
Filesexampleshw_features | |
---|---|
.. | |
debug_spi.py | |
debug_spi_reg.py | |
uart_bridge.py |
debug_spi.py#!/usr/bin/env python3 # # This file is part of LUNA. # from nmigen import Signal, Elaboratable, Module from nmigen.lib.cdc import FFSynchronizer from luna import top_level_cli from luna.gateware.utils.cdc import synchronize from luna.gateware.interface.spi import SPIDeviceInterface, SPIBus class DebugSPIExample(Elaboratable): """ Hardware meant to demonstrate use of the Debug Controller's SPI interface. """ def __init__(self): # Base ourselves around an SPI command interface. self.interface = SPIDeviceInterface(clock_phase=1) def elaborate(self, platform): m = Module() board_spi = platform.request("debug_spi") # Use our command interface. m.submodules.interface = self.interface # # Synchronize and connect our SPI. # spi = synchronize(m, board_spi) m.d.comb += self.interface.spi.connect(spi) # Turn on a single LED, just to show something's running. led = platform.request('led', 0) m.d.comb += led.eq(1) # Echo back the last received data. m.d.comb += self.interface.word_out.eq(self.interface.word_in) return m if __name__ == "__main__": top_level_cli(DebugSPIExample)