Dennis Field / dvk-mx8m-bsb - History

Replace the 103HT NTC thermistor with a ERTJ1VG103FA as found in TI's TIDA-01182 eval board which has a charge controller IC from the same family and uses an 18650 battery, change is due to it being smaller, cheaper, and has the same B value as the recommended thermistor in the charge controller IC's datasheet, comparing the thermistors' tables shows that they are nearly identical and that it should be a drop-in replacement

Route the VBAT_REG output to the In3.Cu layers, begin placing the passive components around the TCPC PHY chip (same placement positions as EmCraft's), add SIM card slot 3D model and move it onto the PCB area

Route VBUS to the charge controller, move the bypass cap next to the charge controller's VBUS pin (1) in order to make room for the via array, ensure that all of the high-current paths have sufficient copper and that the ampacity of the via arrays meets the requirement, the temperature rise should not exceed ~25C (50C degrees if ambient is 25C) at any copper layer when the PTCs' trip current is reached

Continue layout around the charge controller circuit

Move the charge controller, USB-C TCPC, and RTC to I2C1

Since each of these ICs will be powered at the same time as the SoM regardless of the PWR_EN state, they should share the same I2C bus as the PMIC.

Add top-layer copper pour to various nets on the charge controller, make sure all of the clearances are met and that ample copper available for the high current paths (maximize copper area)

Used TI's BQ2589x reference designs.

Add Eco2.User drawing to the EmCr_SOM_IMX8M_Outline footprint which shows where there are components and traces underneath the SoM in the "hatched" area

Use I2C3 bus instead of I2C1 bus based on EmCraft's feedback