Dennis Field / dvk-mx8m-bsb - History

Update the manufacturing files after the last several commits

Correct the fabrication note 4 now stating "see supplementary pdf" instead of "detail A", add RoHS mark on F.Silk layer

Increase various power-rated trace widths to being equal to the pad sizes they connect, make improvements to various power pin traces

Place the ETH_PHY's VDD33 and AVDD33 (3V3_P) vias closer to their respective pins (4 & 16)

Update the 1.8V inductor's footprint such that its solder mask does not have pointed ends and is a more uniform shape

Add fiducial marking dots on the F.Fab and B.Fab layers

Add reference designators to all footprints on the *.Fab layers

Run the smartcard's IO trace on the top layer, away from the CLK line, the clock being surrounded by RST and SC1_C4 (unused)