test - Files | CADLAB.io

Files

Git URL

copied

Download Files

Last update 5 years 7 months by Noelia Scotti

Search:

FilesPCBZ3R0
..
docs
footprints.pretty
gerbers
shapes3D
AUTHORS.txt
CIAA-Z3R0.png
CIAA-Z3R0_0.png
CIAA-Z3R0_1.jpg
EFM32HG-48LQFP.lib
README.md
ciaa-z3r0-cache.lib
ciaa-z3r0.kicad_pcb	view raw
ciaa-z3r0.kicad_pcb-bak
ciaa-z3r0.lib
ciaa-z3r0.pdf
ciaa-z3r0.pro
ciaa-z3r0.sch	view raw
ciaa-z3r0.svg
ciaa-z3r0.wrl
fp-lib-table
kicad version.txt
usblc6-2.lib

kicad version.txtApplication: kicad
Version: no-vcs-found-91ed3e2~59~ubuntu16.04.1, release build
Libraries:
    wxWidgets 3.0.2
    libcurl/7.47.0 OpenSSL/1.0.2g zlib/1.2.8 libidn/1.32 librtmp/2.3
Platform: Linux 4.4.0-97-generic x86_64, 64 bit, Little endian, wxGTK
Build Info:
    wxWidgets: 3.0.2 (wchar_t,wx containers,compatible with 2.8)
    Boost: 1.58.0
    Curl: 7.47.0
    KiCad compiler: GCC 5.4.0 with C++ ABI 1009
Build settings:
    USE_WX_GRAPHICS_CONTEXT=OFF
    USE_WX_OVERLAY=OFF
    KICAD_SCRIPTING=ON
    KICAD_SCRIPTING_MODULES=ON
    KICAD_SCRIPTING_WXPYTHON=ON
    KICAD_SCRIPTING_ACTION_MENU=ON
    BUILD_GITHUB_PLUGIN=ON
    KICAD_USE_OCE=ON

schneider / test - Files

Files

PCB / ACC / CIAA_ACC / BANK_0.sch

PCB / ACC / CIAA_ACC / BANK_112.sch

PCB / ACC / CIAA_ACC / BANK_500.sch

PCB / ACC / CIAA_ACC / BANK_501.sch

PCB / ACC / CIAA_ACC / BANK_502.sch

PCB / ACC / CIAA_ACC / BANKS_HP.sch

PCB / ACC / CIAA_ACC / BANKS_HR.sch

PCB / ACC / CIAA_ACC / ciaa_acc.kicad_pcb

PCB / ACC / CIAA_ACC / ciaa_acc.sch

PCB / ACC / CIAA_ACC / Digital_IO.sch

PCB / ACC / CIAA_ACC / Expansion.sch

PCB / ACC / CIAA_ACC / FMC-Power.sch

PCB / ACC / CIAA_ACC / FPGA-Power.sch

PCB / ACC / CIAA_ACC / OneBank.sch

PCB / ACC / CIAA_ACC / PMIC.sch

PCB / ACC / CIAA_ACC / Principal.sch

PCB / ACC / CIAA_ACC / RTC-HDMI.sch

PCB / EDU-FSL / EDU_CIAA_K60 / cpu.sch

PCB / EDU-FSL / EDU_CIAA_K60 / EDU_CIAA_K60.kicad_pcb

PCB / EDU-FSL / EDU_CIAA_K60 / EDU_CIAA_K60.sch

PCB / EDU-FSL / EDU_CIAA_K60 / fuente.sch

PCB / EDU-FSL / EDU_CIAA_K60 / gpio.sch

PCB / EDU-FSL / EDU_CIAA_K60 / JTAG.sch

PCB / EDU-FSL / EDU_CIAA_K60 / on_board_io.sch

PCB / EDU-FSL / EDU_CIAA_K60 / rsS485.sch

PCB / EDU-FSL / EDU_CIAA_K60 / usb_otg.sch

PCB / EDU-INTEL / cpu.sch

PCB / EDU-INTEL / edk.kicad_pcb

PCB / EDU-INTEL / edk.sch

PCB / EDU-INTEL / power.sch

PCB / EDU-INTEL / sd_card.sch

PCB / EDU-INTEL / usb.sch

PCB / EDU-NXP / cpu.sch

PCB / EDU-NXP / edu-ciaa-nxp.kicad_pcb

PCB / EDU-NXP / edu-ciaa-nxp.sch

PCB / EDU-NXP / fuente.sch

PCB / EDU-NXP / gpio.sch

PCB / EDU-NXP / ON_BOARD_IO.sch

PCB / EDU-NXP / rsS485_can.sch

PCB / EDU-NXP / usb.sch

PCB / EDU-XILINX / ProyectoKicad / Bank14.sch

PCB / EDU-XILINX / ProyectoKicad / Bank15.sch

PCB / EDU-XILINX / ProyectoKicad / Bank35.sch

PCB / EDU-XILINX / ProyectoKicad / EduCiaaX.sch

PCB / EDU-XILINX / ProyectoKicad / FPGAConfig.sch

PCB / EDU-XILINX / ProyectoKicad / FPGAPower.sch

PCB / EDU-XILINX / ProyectoKicad / Power.sch

PCB / EDU-XILINX / ProyectoKicad / Usb.sch

PCB / FSL-MINI / CIAA_FSL_MINI.kicad_pcb

PCB / FSL-MINI / CIAA_FSL_MINI.sch

PCB / FSL-MINI / cpu.sch

PCB / FSL-MINI / ethernet.sch

PCB / FSL-MINI / fuente.sch

PCB / FSL-MINI / IO.sch

PCB / FSL-MINI / memories.sch

PCB / FSL-MINI / usb_otg.sch

PCB / FSL / CIAA_K60 / analog.sch

PCB / FSL / CIAA_K60 / analog_out.sch

PCB / FSL / CIAA_K60 / CIAA_K60.kicad_pcb

PCB / FSL / CIAA_K60 / CIAA_K60.sch

PCB / FSL / CIAA_K60 / cpu.sch

PCB / FSL / CIAA_K60 / din.sch

PCB / FSL / CIAA_K60 / dout.sch

PCB / FSL / CIAA_K60 / ethernet.sch

PCB / FSL / CIAA_K60 / fuente.sch

PCB / FSL / CIAA_K60 / gpio.sch

PCB / FSL / CIAA_K60 / JTAG.sch

PCB / FSL / CIAA_K60 / memories.sch

PCB / FSL / CIAA_K60 / rsS485_rs232_can.sch

PCB / FSL / CIAA_K60 / usb_otg.sch

PCB / NXP / .kicad_pcb.kicad_pcb

PCB / NXP / analog.sch

PCB / NXP / analog_out.sch

PCB / NXP / ciaa-nxp.kicad_pcb

PCB / NXP / ciaa-nxp.sch

PCB / NXP / cpu.sch

PCB / NXP / din.sch

PCB / NXP / dout.sch