Files
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PCB / ACC / CIAA_ACC / BANK_0.sch
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PCB / ACC / CIAA_ACC / BANK_112.sch
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PCB / ACC / CIAA_ACC / BANK_500.sch
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PCB / ACC / CIAA_ACC / BANK_501.sch
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PCB / ACC / CIAA_ACC / BANK_502.sch
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PCB / ACC / CIAA_ACC / BANKS_HP.sch
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PCB / ACC / CIAA_ACC / BANKS_HR.sch
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PCB / ACC / CIAA_ACC / ciaa_acc.kicad_pcb
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PCB / ACC / CIAA_ACC / ciaa_acc.sch
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PCB / ACC / CIAA_ACC / Digital_IO.sch
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PCB / ACC / CIAA_ACC / Expansion.sch
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PCB / ACC / CIAA_ACC / FMC-Power.sch
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PCB / ACC / CIAA_ACC / FPGA-Power.sch
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PCB / ACC / CIAA_ACC / OneBank.sch
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PCB / ACC / CIAA_ACC / PMIC.sch
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PCB / ACC / CIAA_ACC / Principal.sch
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PCB / ACC / CIAA_ACC / RTC-HDMI.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / cpu.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / EDU_CIAA_K60.kicad_pcb
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PCB / EDU-FSL / EDU_CIAA_K60 / EDU_CIAA_K60.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / fuente.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / gpio.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / JTAG.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / on_board_io.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / rsS485.sch
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PCB / EDU-FSL / EDU_CIAA_K60 / usb_otg.sch
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PCB / EDU-INTEL / cpu.sch
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PCB / EDU-INTEL / edk.kicad_pcb
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PCB / EDU-INTEL / edk.sch
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PCB / EDU-INTEL / power.sch
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PCB / EDU-INTEL / sd_card.sch
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PCB / EDU-INTEL / usb.sch
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PCB / EDU-NXP / cpu.sch
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PCB / EDU-NXP / edu-ciaa-nxp.kicad_pcb
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PCB / EDU-NXP / edu-ciaa-nxp.sch
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PCB / EDU-NXP / fuente.sch
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PCB / EDU-NXP / gpio.sch
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PCB / EDU-NXP / ON_BOARD_IO.sch
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PCB / EDU-NXP / rsS485_can.sch
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PCB / EDU-NXP / usb.sch
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PCB / EDU-XILINX / ProyectoKicad / Bank14.sch
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PCB / EDU-XILINX / ProyectoKicad / Bank15.sch
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PCB / EDU-XILINX / ProyectoKicad / Bank35.sch
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PCB / EDU-XILINX / ProyectoKicad / EduCiaaX.sch
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PCB / EDU-XILINX / ProyectoKicad / FPGAConfig.sch
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PCB / EDU-XILINX / ProyectoKicad / FPGAPower.sch
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PCB / EDU-XILINX / ProyectoKicad / Power.sch
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PCB / EDU-XILINX / ProyectoKicad / Usb.sch
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PCB / FSL-MINI / CIAA_FSL_MINI.kicad_pcb
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PCB / FSL-MINI / CIAA_FSL_MINI.sch
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PCB / FSL-MINI / cpu.sch
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PCB / FSL-MINI / ethernet.sch
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PCB / FSL-MINI / fuente.sch
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PCB / FSL-MINI / IO.sch
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PCB / FSL-MINI / memories.sch
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PCB / FSL-MINI / usb_otg.sch
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PCB / FSL / CIAA_K60 / analog.sch
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PCB / FSL / CIAA_K60 / analog_out.sch
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PCB / FSL / CIAA_K60 / CIAA_K60.kicad_pcb
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PCB / FSL / CIAA_K60 / CIAA_K60.sch
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PCB / FSL / CIAA_K60 / cpu.sch
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PCB / FSL / CIAA_K60 / din.sch
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PCB / FSL / CIAA_K60 / dout.sch
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PCB / FSL / CIAA_K60 / ethernet.sch
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PCB / FSL / CIAA_K60 / fuente.sch
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PCB / FSL / CIAA_K60 / gpio.sch
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PCB / FSL / CIAA_K60 / JTAG.sch
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PCB / FSL / CIAA_K60 / memories.sch
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PCB / FSL / CIAA_K60 / rsS485_rs232_can.sch
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PCB / FSL / CIAA_K60 / usb_otg.sch
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PCB / NXP / .kicad_pcb.kicad_pcb
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PCB / NXP / analog.sch
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PCB / NXP / analog_out.sch
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PCB / NXP / ciaa-nxp.kicad_pcb
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PCB / NXP / ciaa-nxp.sch
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PCB / NXP / cpu.sch
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PCB / NXP / din.sch
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PCB / NXP / dout.sch
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PCB / NXP / ethernet.sch
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PCB / NXP / fuente.sch
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PCB / NXP / gpio.sch
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PCB / NXP / mem.sch
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PCB / NXP / rsS485_rs232_can.sch
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PCB / NXP / usb_otg.sch
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PCB / PIC / analog.sch
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PCB / PIC / analog_out.sch
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PCB / PIC / ciaa-pic.kicad_pcb
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PCB / PIC / ciaa-pic.sch
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PCB / PIC / cpu.sch
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PCB / PIC / din.sch
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PCB / PIC / dout.sch
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PCB / PIC / ethernet.sch
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PCB / PIC / fuente.sch
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PCB / PIC / gpio.sch
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PCB / PIC / JTAG.sch
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PCB / PIC / mem.sch
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PCB / PIC / rsS485_rs232_can.sch
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PCB / PIC / usb_otg.sch
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PCB / pico / cpu.sch
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PCB / pico / debugger.sch
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PCB / pico / picociaa.kicad_pcb
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PCB / pico / picociaa.sch
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PCB / RX / hw / .kicad_pcb.kicad_pcb
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PCB / RX / hw / analog.sch
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PCB / RX / hw / analog_out.sch
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PCB / RX / hw / ciaa-rx.kicad_pcb
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PCB / RX / hw / ciaa-rx.sch
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PCB / RX / hw / cpu.sch
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PCB / RX / hw / din.sch
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PCB / RX / hw / dout.sch
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PCB / RX / hw / ethernet.sch
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PCB / RX / hw / fuente.sch
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PCB / RX / hw / gpio.sch
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PCB / RX / hw / mem.sch
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PCB / RX / hw / rsS485_rs232_can.sch
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PCB / RX / hw / usb_otg.sch
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PCB / Safety / BUS_ISA.sch
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PCB / Safety / CAN.sch
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PCB / Safety / CIAA_Safety_VTI_1.0.kicad_pcb
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PCB / Safety / CIAA_Safety_VTI_1.0.sch
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PCB / Safety / CPU.sch
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PCB / Safety / ETHERNET.sch
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PCB / Safety / MEM_FLASH_SPI.sch
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PCB / Safety / RM48L952.sch
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PCB / Safety / USB HOST - MEM SD.sch
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PCB / Safety / USB OTG.sch
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PCB / Safety / USB.sch
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PCB / Z3R0 / ciaa-z3r0.kicad_pcb
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PCB / Z3R0 / ciaa-z3r0.sch
Last update 5 years 7 months
by
Noelia Scotti
ciaa-z3r0-job.gbrjobG04 Gerber job file with board parameters* %TF.FileFunction,JobInfo*% %TF.Part,SinglePCB*% G04 Single PCB fabrication instructions* %TF.GenerationSoftware,KiCad,Pcbnew,no-vcs-found-72d4889~60~ubuntu16.04.1*% %TF.CreationDate,2017-10-19T10:35:59-03:00*% %TF.ProjectId,ciaa-z3r0,636961612D7A3372302E6B696361645F,rev?*% %MOMM*% G04 Overall board parameters* %TJ.B.Size.X,18.950*% %TJ.B.Size.Y,51.960*% %TJ.B.LayerNum,2*% %TJ.B.Overall.Thickness,1.600*% %TJ.B.Legend.Present,Both*% %TJ.B.SolderMask.Present,Both*% G04 board design rules* %TJ.D.PadToPad.Out,0.200*% %TJ.D.PadToTrack.Out,0.200*% %TJ.D.TrackToTrack.Out,0.200*% %TJ.D.MinLineWidth.Out,0.250*% %TJ.D.TrackToRegion.Out,0.300*% %TJ.D.RegionToRegion.Out,0.300*% G04 Layer Structure* %TJ.L."Copper,L1,Top",Positive,ciaa-z3r0-F.Cu.gtl*% %TJ.L."Copper,L2,Bot",Positive,ciaa-z3r0-B.Cu.gbl*% %TJ.L."Glue,Bot",Positive,ciaa-z3r0-B.Adhes.gba*% %TJ.L."Glue,Top",Positive,ciaa-z3r0-F.Adhes.gta*% %TJ.L."SolderPaste,Bot",Positive,ciaa-z3r0-B.Paste.gbp*% %TJ.L."SolderPaste,Top",Positive,ciaa-z3r0-F.Paste.gtp*% %TJ.L."Legend,Bot",Positive,ciaa-z3r0-B.SilkS.gbo*% %TJ.L."Legend,Top",Positive,ciaa-z3r0-F.SilkS.gto*% %TJ.L."SolderMask,Bot",Negative,ciaa-z3r0-B.Mask.gbs*% %TJ.L."SolderMask,Top",Negative,ciaa-z3r0-F.Mask.gts*% %TJ.L."Profile",Positive,ciaa-z3r0-Edge.Cuts.gm1*% M02*