added syslg & cleanup SSID/Device name
by liebman 6 years 6 months
board 2.1a
by liebman 7 years 2 months
board version 2.1
by liebman 7 years 2 months
WIP
by liebman 7 years 2 months
updated with new voltage regulator and pwrgd signal for power fail
by liebman 7 years 3 months
added power fail circuit for ATtiny85 added BOM save all clock properties at power fail
by liebman 7 years 3 months
Alpha 2.0 board
by liebman 7 years 3 months
"development" version - board that does not have the clock driver
by liebman 7 years 3 months
switch to 1.5v for clock voltage regulator
by chris.l 7 years 5 months
switch to eagle cad for hardware
by Chris Liebman 7 years 6 months
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