Version 1.0
by jackgassett 6 years 3 weeks
189e1fe6
Checked and first cleanup of schematic.
by jackgassett 6 years 3 weeks
3ac9641a
All airwires routed, no drc errors.
by jackgassett 6 years 3 weeks
c0f86108
Added bypass caps.
by jackgassett 6 years 3 weeks
06657aef
Added Power Supply
by jackgassett 6 years 3 weeks
3b2da1fa
Route JTAG
by jackgassett 6 years 3 weeks
fff8df8f
Route the rest of the IO pins.
by jackgassett 6 years 3 weeks
79c7483b
Fixed the names for connector nets
by jackgassett 6 years 3 weeks
a4f719c8
Remove junk from hidden layers
by jackgassett 6 years 1 month
aaa19634
First revision of fpga modules
by jackgassett 6 years 1 month
5d304f18
Report a bug