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Senior Design Project - Circuit
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Senior Design Working Draft Rev C0 4-13.brd
Top
Route2
Route15
Bottom
Pads
Vias
Unrouted
Dimension
tPlace
bPlace
tOrigins
bOrigins
tNames
bNames
tValues
bValues
tStop
bStop
tCream
bCream
tFinish
bFinish
tGlue
bGlue
tTest
bTest
tKeepout
bKeepout
tRestrict
bRestrict
vRestrict
Drills
Holes
Milling
Measures
Document
Reference
tDocu
bDocu
Patch_Top
Vscore
fp3
Name
Beschreib
BGA-Top
BD-Top
fp8
fp9
fp0
LPC17xx
tSilk
IDFDebug
FRNTMAAT1
FRNTMAAT2
Patch_BOT
BACKMAAT1
Rect_Pads
KAP_TEKEN
KAP_MAAT1
_tsilk
_bsilk
tTestmark
bTestmark
_tNames
_bNames
_tValues
_bValues
Mask
SMDSTROOK
tAdjust
bAdjust
Drill_legend
Notes
HeatSink
_bDocu
Contour
200bmp
203bmp
204bmp
205bmp
206bmp
207bmp
208bmp
209bmp
210bmp
211bmp
212bmp
213bmp
214bmp
215bmp
216bmp
225bmp
226bmp
227bmp
228bmp
229bmp
230bmp
231bmp
Eagle3D_PG2
Eagle3D_PG3
Housing
Edge
Descript
SMDround
cooling
routoute
Revision
c5f6f91e
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Senior Design Working Draft Rev C0 4-13.brd
c5f6f91e
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/project/658/c5f6f91e6c2e0feac4138a56d9a4a6834e1943f8/circuit/U2VuaW9yIERlc2lnbiBXb3JraW5nIERyYWZ0IFJldiBDMCA0LTEzLmJyZA%3D%3D
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