Files
-
Altium / SAM_V71_Xplained_Ultra_rev8_cad_source / SAMV71_Xplained_Ultra.PcbDoc
-
Altium / SAM_V71_Xplained_Ultra_rev8_cad_source / SAMV71_Xplained_Ultra_Audio.SchDoc
-
Altium / SAM_V71_Xplained_Ultra_rev8_cad_source / SAMV71_Xplained_Ultra_CAN.SchDoc
-
Altium / SAM_V71_Xplained_Ultra_rev8_cad_source / SAMV71_Xplained_Ultra_Connectors.SchDoc
-
Altium / SAM_V71_Xplained_Ultra_rev8_cad_source / SAMV71_Xplained_Ultra_EDBG.SchDoc
-
Altium / SAM_V71_Xplained_Ultra_rev8_cad_source / SAMV71_Xplained_Ultra_Ethernet.SchDoc
-
Altium / SAM_V71_Xplained_Ultra_rev8_cad_source / SAMV71_Xplained_Ultra_MCU_Peripherals.SchDoc
-
Altium / SAM_V71_Xplained_Ultra_rev8_cad_source / SAMV71_Xplained_Ultra_Memory.SchDoc
-
Altium / SAM_V71_Xplained_Ultra_rev8_cad_source / SAMV71_Xplained_Ultra_Power_Converter.SchDoc
-
Altium / SAM_V71_Xplained_Ultra_rev8_cad_source / SAMV71_Xplained_Ultra_Power_Multiplexer.SchDoc
-
Altium / SAM_V71_Xplained_Ultra_rev8_cad_source / SAMV71_Xplained_Ultra_Power_Supply.SchDoc
-
Altium / SAM_V71_Xplained_Ultra_rev8_cad_source / SAMV71_Xplained_Ultra_Shield_Connectors.SchDoc
-
Altium / SAM_V71_Xplained_Ultra_rev8_cad_source / SAMV71_Xplained_Ultra_Target_MCU.SchDoc
-
Altium / SAM_V71_Xplained_Ultra_rev8_cad_source / SAMV71_Xplained_Ultra_TopLevel.SchDoc
-
KiCad / ColdfireXilinxDevBoard / ColdfireXilinxDevBoard.kicad_pcb
-
KiCad / ColdfireXilinxDevBoard / ColdfireXilinxDevBoard.kicad_sch
-
KiCad / ColdfireXilinxDevBoard / in_out_conn.kicad_sch
-
KiCad / ColdfireXilinxDevBoard / xilinx.kicad_sch
Last update 5 months 3 weeks
by
Will Hegarty
| FilesKiCadColdfireXilinxDevBoardkit-dev-coldfire.pretty | |
|---|---|
| .. | |
| D_SOT-23_ANK.kicad_mod | |
| FSUPCMS.kicad_mod | |
| JACK_ALIM.kicad_mod | |
| SM1206POL.kicad_mod | |
| SOT23EBC.kicad_mod | |
| SOT353.kicad_mod | |
| SW_PUSH_SMALL.kicad_mod | |
| SW_SPDT.kicad_mod |
FSUPCMS.kicad_mod(module FSUPCMS (layer F.Cu) (tedit 5E00E041) (attr smd) (fp_text reference FSUPCMS (at -0.25 0 90) (layer F.SilkS) (effects (font (size 1.016 0.762) (thickness 0.1524))) ) (fp_text value VAL*** (at 0.25 0 90) (layer F.Fab) (effects (font (size 1.016 0.762) (thickness 0.1524))) ) (fp_line (start 5.588 2.032) (end 1.27 2.032) (layer F.SilkS) (width 0.2032)) (fp_line (start 1.27 2.032) (end 1.27 2.54) (layer F.SilkS) (width 0.2032)) (fp_line (start 5.588 -2.032) (end 1.27 -2.032) (layer F.SilkS) (width 0.2032)) (fp_line (start 1.27 -2.032) (end 1.27 -2.54) (layer F.SilkS) (width 0.2032)) (fp_line (start -5.461 -2.032) (end -1.27 -2.032) (layer F.SilkS) (width 0.2032)) (fp_line (start -1.27 -2.032) (end -1.27 -2.54) (layer F.SilkS) (width 0.2032)) (fp_line (start -5.461 2.032) (end -1.27 2.032) (layer F.SilkS) (width 0.2032)) (fp_line (start -1.27 2.032) (end -1.27 2.54) (layer F.SilkS) (width 0.2032)) (fp_line (start -5.461 2.54) (end 5.588 2.54) (layer F.SilkS) (width 0.2032)) (fp_line (start 5.588 -2.54) (end -5.461 -2.54) (layer F.SilkS) (width 0.2032)) (fp_line (start 5.588 -2.54) (end 5.588 2.54) (layer F.SilkS) (width 0.2032)) (fp_line (start -5.461 2.54) (end -5.461 -2.54) (layer F.SilkS) (width 0.2032)) (fp_line (start -5.75 3) (end -5.75 -3) (layer F.CrtYd) (width 0.12)) (fp_line (start -5.75 -3) (end 6 -3) (layer F.CrtYd) (width 0.12)) (fp_line (start 6 -3) (end 6 3) (layer F.CrtYd) (width 0.12)) (fp_line (start 6 3) (end -5.75 3) (layer F.CrtYd) (width 0.12)) (pad 1 smd rect (at -3.175 0 90) (size 3.556 4.191) (layers F.Cu F.Paste F.Mask)) (pad 2 smd rect (at 3.175 0 90) (size 3.556 4.191) (layers F.Cu F.Paste F.Mask)) (model ${KICAD6_3DMODEL_DIR}/Capacitor_SMD.3dshapes/C_2816_7142Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) )