Mikołaj Sowiński / Kasli SoC - History | CADLAB.io

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v1.1rc1

by Filip Świtakowski 1 year 5 months

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ce14cec8

v1.0.2rc1

by Filip Świtakowski 1 year 6 months

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65357c07

v1.0.1rc1

by Filip Świtakowski 1 year 11 months

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1f416e77

Fixed issues after design review.

by Filip Świtakowski 3 years 3 months

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55d56bfa

v1.0rc3

by Filip Świtakowski 3 years 4 months

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a1f239a8

v1.0rc2

by Greg 3 years 4 months

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cfacad23

Ethernet, I2C, GPIO_INTx, some LEDs connected to PS.

by Filip Świtakowski 3 years 7 months

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fa9ce08d

power planes changes

by Filip Świtakowski 3 years 11 months

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727d7668

Schematics cleanup. Added variants.

by Filip Świtakowski 4 years 1 month

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63ca1e7f

Changed Rx/Tx UART voltage to 1.8

by Filip Świtakowski 4 years 3 months

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6a8d0043