Mikołaj Sowiński / Kasli SoC - History

v1.0rc3

by Filip Świtakowski 4 years 6 months

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a1f239a8

v1.0rc2

by Greg 4 years 6 months

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cfacad23

Ethernet, I2C, GPIO_INTx, some LEDs connected to P...

by Filip Świtakowski 4 years 10 months

Ethernet, I2C, GPIO_INTx, some LEDs connected to PS.

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fa9ce08d

power planes changes

by Filip Świtakowski 5 years 1 month

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727d7668

Final routing.

by Filip Świtakowski 5 years 3 months

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b967030c

Changed Rx/Tx UART voltage to 1.8

by Filip Świtakowski 5 years 6 months

Changed Rx/Tx UART voltage to 1.8
Added VREF_DDR and VTT_DDT regulator
removed IC12
P5V0_CLK-->chabged to P3V6
Added DOONE pullup
removed FPGA ref.
Added 0R res to TPSA7200RGW to configuration pins.
Added power budget, ETH chip
Removed Power controller.
changes in Zynq POR and SRST.
Clock signals routed to Clock pins.

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6a8d0043