Files
-
hardware / 1v0 / PCB / LimeSDR_Mini_1v0_Rounded.PcbDoc
-
hardware / 1v0 / PCB / LimeSDR_Mini_1v0_Rounded_panel.PcbDoc
-
hardware / 1v0 / Schematics / 01_BlockDiagram.SchDoc
-
hardware / 1v0 / Schematics / 02_PowerDiagram.SchDoc
-
hardware / 1v0 / Schematics / 03_ClockDiagram.SchDoc
-
hardware / 1v0 / Schematics / 04_LMS7002M_Misc.SchDoc
-
hardware / 1v0 / Schematics / 05_LMS7002M_RF.SchDoc
-
hardware / 1v0 / Schematics / 06_LMS7002M_Power.SchDoc
-
hardware / 1v0 / Schematics / 07_FPGA.SchDoc
-
hardware / 1v0 / Schematics / 08_USB3_0_device.SchDoc
-
hardware / 1v0 / Schematics / 09_Misc.SchDoc
-
hardware / 1v1 / PCB / LimeSDR_Mini_1v1_Rounded.PcbDoc
-
hardware / 1v1 / PCB / LimeSDR_Mini_1v1_Rounded_panel.PcbDoc
-
hardware / 1v1 / PCB / LimeSDR_Mini_1v1_Rounded_soldermask.PcbDoc
-
hardware / 1v1 / Schematics / 01_BlockDiagram.SchDoc
-
hardware / 1v1 / Schematics / 02_PowerDiagram.SchDoc
-
hardware / 1v1 / Schematics / 03_ClockDiagram.SchDoc
-
hardware / 1v1 / Schematics / 04_LMS7002M_Misc.SchDoc
-
hardware / 1v1 / Schematics / 05_LMS7002M_RF.SchDoc
-
hardware / 1v1 / Schematics / 06_LMS7002M_Power.SchDoc
-
hardware / 1v1 / Schematics / 07_FPGA.SchDoc
-
hardware / 1v1 / Schematics / 08_USB3_0_device.SchDoc
-
hardware / 1v1 / Schematics / 09_Misc.SchDoc
-
hardware / 1v2 / PCB / LimeSDR_Mini_1v2_Rounded.PcbDoc
-
hardware / 1v2 / PCB / LimeSDR_Mini_1v2_Rounded_panel.PcbDoc
-
hardware / 1v2 / Schematics / 01_BlockDiagram.SchDoc
-
hardware / 1v2 / Schematics / 02_PowerDiagram.SchDoc
-
hardware / 1v2 / Schematics / 03_ClockDiagram.SchDoc
-
hardware / 1v2 / Schematics / 04_LMS7002M_Misc.SchDoc
-
hardware / 1v2 / Schematics / 05_LMS7002M_RF.SchDoc
-
hardware / 1v2 / Schematics / 06_LMS7002M_Power.SchDoc
-
hardware / 1v2 / Schematics / 07_FPGA.SchDoc
-
hardware / 1v2 / Schematics / 08_USB3_0_device.SchDoc
-
hardware / 1v2 / Schematics / 09_Misc.SchDoc
-
hardware / 1v3 / PCB / LimeSDR_Mini_1v3_Rounded.PcbDoc
-
hardware / 1v3 / PCB / LimeSDR_Mini_1v3_Rounded_old.PcbDoc
-
hardware / 1v3 / PCB / LimeSDR_Mini_1v3_Rounded_panel.PcbDoc
-
hardware / 1v3 / Schematics / 01_BlockDiagram.SchDoc
-
hardware / 1v3 / Schematics / 02_PowerDiagram.SchDoc
-
hardware / 1v3 / Schematics / 03_ClockDiagram.SchDoc
-
hardware / 1v3 / Schematics / 04_LMS7002M_Misc.SchDoc
-
hardware / 1v3 / Schematics / 05_LMS7002M_RF.SchDoc
-
hardware / 1v3 / Schematics / 06_LMS7002M_Power.SchDoc
-
hardware / 1v3 / Schematics / 07_FPGA.SchDoc
-
hardware / 1v3 / Schematics / 08_USB3_0_device.SchDoc
-
hardware / 1v3 / Schematics / 09_Misc.SchDoc
Last update 1 year 8 months
by
usama.bashir.cowlar@gmail.com
| Fileshardware1v0Project Outputs for LimeSDR_Mini_1v0BOM | |
|---|---|
| .. | |
| LimeSDR_Mini_1v0_BOMr0.xls |