Dominik Sliwa / test - History

PCB: traces cleanup

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>

Changes:

-fix led order
-fix transistor routing
-modify usb hub strapping and fix crystal footprint
-remove copper under sd pads
-routing cleanup
-change revision to 1.1

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>

SDReWire: fix back-to-back transistors circuit

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>

README.md: add render image

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>

SDReWire: v1.0 production data

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>

sdrewire: pcb v1

Some itra-pair inversions for easier routing.
Fixed crystal pinouts
sd power p-fet changed for smaller package

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>

Merge pull request #2 from agners/fix-sd-mux-dir

Fix direction of hierarchical label SD_MUX_SEL

Update README.md

Added 1.2V ftdi IO voltage option and few fixups.

Merge pull request #1 from agners/add-readme-license

Add README.md and LICENSE

Add README.md and LICENSE

Put the project under the CERN-OHL-W license. This is a weakly
reciprocal license, for the example above, if you release your part
of the design under CERN-OHL-W, somebody who distributes a bitstream
which includes your part does not need to distribute the rest of the
design files as well.