Giulio / ceda-schematics - History

Schematics refactoring:

- New sheet reserved to video memory.
- Removed video memory parts inside video_generation.
- Removed video memory parts inside GPIO.
- Generic cleanup to keep all circuits inside each sheet.

Discovered WE and OE signals for video memories, plus others

Added FDC sheet (WIP), added partial parallel port inout

Added memory management sheet with ROM/RAM addressing mux

Some steps in bank switching and crtc circuits

- crtc pixel clock generator
- 2k ram, enabling logic (heavily incomplete)
- other 2k ram, annotation regarding data bus