Giulio / ceda-schematics - History

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    Renamed conflicting resistors in FDC
    by giuliof 4 months 2 weeks
    Renamed conflicting resistors in FDC

    R1xx are randomly assigned just to avoid conflicts with following commit
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    3a055cba
    Fixed label PERROR
    by giuliof 5 months 10 hours
    Changes
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    32d1ffcc
    Missing global label "dram_addr_sel"
    by giuliof 5 months 10 hours
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    85940b8c
    pcb: first commit
    by giuliof 5 months 1 week
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    0600ed36
    Fixed some wrong labels
    by giuliof 5 months 1 week
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    92249d18
    Fixed packages
    by giuliof 5 months 1 week
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    f43cd778
    Assigned default footprints to ICs
    by giuliof 5 months 2 weeks
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    75aa580a
    Annotated all components
    by giuliof 5 months 2 weeks
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    8de69180
    drc: fixed labels
    by giuliof 5 months 2 weeks
    Changes
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    25262c06
    drc: corrections in net names
    by giuliof 5 months 2 weeks
    Changes
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    f95822be
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