Fixed component name.

Pulled from master.

Finished wiring power supply.

Merge pull request #10 from calstar/fix-fpga-schematic Connected pins SA4 and SA5. Connected interrupt pin.

Connected pins SA4 and SA5. Connected interrupt pin

Merge pull request #9 from calstar/rpi-left Rpi left

Added FPGA buses.

Merge remote-tracking branch 'origin/master' into rpi-left

Removed LVDSRST Pin

Cleaned up FPGA Schematic