core footprint assignment ongoing

Merge pull request #10 from calstar/fix-fpga-schematic Connected pins SA4 and SA5. Connected interrupt pin.

Connected pins SA4 and SA5. Connected interrupt pin

Merge pull request #9 from calstar/rpi-left Rpi left

Added FPGA buses.

Merge remote-tracking branch 'origin/master' into rpi-left

Removed LVDSRST Pin

Cleaned up FPGA Schematic

Connected interrupt pins, SPIHS and SPIO Pins from FPGA to CAS Bus

Connected the SPIO Bus between the FPGA, the CAS Bus and the CM4. Connected the LVDS and the SMI Bus.