Files

FMC_Fanout.pro
update=10/02/2021 17:27:6 version=1 last_client = kicad [general] version=1 RootSch= BoardNm= [cvpcb] version=1 netIExt=net [eeschema] version=1 LibDir= [eeschema/libraries] [schematic_editor] version=1 PageLayoutDescrFile= PlotDirectoryName=C:\Users\dbaudin\Documents_Local\Projet\BINGO\Implementation\Electronic\FMC_Extension/0001/Doc/Schematic SubpartIdSeparator=0 SubpartFirstId=65 NetFmtName=Pcbnew SpiceAjustPassiveValues=0 LabSize=50 ERC_TestSimilarLabels=1 [pcbnew] version=1 PageLayoutDescrFile= LastNetListRead= CopperLayerCount=6 BoardThickness=1.6 AllowMicroVias=0 AllowBlindVias=0 RequireCourtyardDefinitions=0 ProhibitOverlappingCourtyards=1 MinTrackWidth=0.15 MinViaDiameter=0.35 MinViaDrill=0.1 MinMicroViaDiameter=0.2 MinMicroViaDrill=0.1 MinHoleToHole=0.25 [pcbnew/Netclasses] [pcbnew/Netclasses/Default] Name=Default Clearance=0.15 TrackWidth=0.15 ViaDiameter=0.35 ViaDrill=0.1 uViaDiameter=0.2 uViaDrill=0.1 dPairWidth=0.15 dPairGap=0.15 dPairViaGap=0.5 SilkLineWidth=0.12 SilkTextSizeV=1 SilkTextSizeH=1 SilkTextSizeThickness=0.15 SilkTextItalic=0 SilkTextUpright=1 CopperLineWidth=0.2 CopperTextSizeV=1.5 CopperTextSizeH=1.5 CopperTextThickness=0.3 CopperTextItalic=0 CopperTextUpright=1 EdgeCutLineWidth=0.05 CourtyardLineWidth=0.05 OthersLineWidth=0.15 OthersTextSizeV=1 OthersTextSizeH=1 OthersTextSizeThickness=0.15 OthersTextItalic=0 OthersTextUpright=1 SolderMaskClearance=0.05 SolderMaskMinWidth=0 SolderPasteClearance=0 SolderPasteRatio=-0 [pcbnew/Layer.F.Cu] Name=F.Cu Type=0 Enabled=1 [pcbnew/Layer.In1.Cu] Name=In1.Cu Type=0 Enabled=1 [pcbnew/Layer.In2.Cu] Name=In2.Cu Type=0 Enabled=1 [pcbnew/Layer.In3.Cu] Name=In3.Cu Type=0 Enabled=1 [pcbnew/Layer.In4.Cu] Name=In4.Cu Type=0 Enabled=1 [pcbnew/Layer.B.Cu] Name=B.Cu Type=0 Enabled=1

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0001 / Design / Clock_Gen.sch
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