Fixed pin header 3d models.
We had some of the models doubled up or not fully disabled. Now the TH
pin headers are all using KiCad V5 3d model locations and are all
disabled.
This fixes #23
by
esden
5 years 9 months
Initial commit of iCEBreaker V1.0b.
* Added 1V8 jumper for FPGA GPIO bank 2. Not added to 0&1 as the pins on
that bank are also connected to the FTDI chip. Extra precausions have to
be taken in that situation as the FTDI chip GPIO are connected to 3.3V.
The user will have to assure that there are no problems and the FPGA
will not fry either itself or the FTDI chip. We do not want to encourage
that, but if you feel adventerous you are welcome to try. ;) Closes #15
by
esden
6 years 4 months