Jakub Jendryka / Acquisition - History

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    Added DDR3 memory
    by Jakub Jendryka 5 years 4 months
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    4e187932
    Changed to new fpga library
    by Jakub Jendryka 5 years 4 months
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    3d2ebb12
    Merge pull request #5 from JJendryka/new_fpga_lib Added new fpga library
    by Jakub Jendryka 5 years 4 months
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    ac338f9d
    Added new fpga library
    by Jakub Jendryka 5 years 4 months
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    d0c1e7dd
    Merge pull request #1 from JJendryka/psu Added input protection
    by Jakub Jendryka 5 years 4 months
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    6cbd70fb
    Added input protection
    by zakrent 5 years 4 months
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    1854a13b
    Backlink to CADLAB.io has been added.
    by Jakub Jendryka 5 years 4 months
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    bb338538
    Initial commit
    by Jakub Jendryka 5 years 4 months
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    38604273
    Report a bug