Glasgow Embedded / Glasgow - History

gateware.fx2_crossbar: eliminate wait states.

Instead of wait states, pipelining logic is extended to invalidate
flags while an operation is in progress.

gateware.fx2_crossbar: re-register FX2 outputs.

Before this commit, the FX2 arbiter would incorrectly use FX2 outputs
in the fabric that were actually only valid for 1/2 of IFCLK period,
because they were DDR input signals. After this commit, these signals
are correctly re-registered in fabric so that they are valid for
an entire IFCLK period, increasing latency by one cycle.

At last, this can be done safely, by extending the pipeline logic by
one more stage. This adds a wait state, but we can fix that later.

This improves Fmax by a factor of 1.5-1.8.

Fixes #89 (again).

revC1: switch to a SOD-523 diode for the SYNC protection

gateware.fx2_crossbar: rework to handle pipelining. (UPDATE FIRMWARE)

This commit reverts all PF changes and avoids relying on FF to handle
IN FIFO. Instead, the level of FX2-side FIFO is now mirrored on
the FPGA side, and PKTEND is asserted at precisely the right cycle.

Moreover, ZLPs are now sent when appropriate to avoid apparent hangs
when issuing BULK IN URBs that are larger than one packet size.

This commit doesn't yet correctly re-register the signals that are
FX2 outputs, but it's very close.

Overall, the crossbar is significantly simpler, shorter, faster and
more reliable now, and the firmware is smaller.

revC1: make the routing around the ESD protection more uniform

revC: tiny changes to text placement on schematic for readability.

gateware.fx2_crossbar: factor out more logic into _FX2Bus. NFC.

This only keeps actual crossbar logic in the crossbar, no logic level
adjustment or pipeline delays.