kirill9617 / Luna - History

pre r0.2 -- minor improvements and debug fixes

by Kate Temkin 5 years 6 months

pre r0.2 -- minor improvements and debug fixes

- add silkscreen connector diagrams
- added test points for clock and voltage rails
- moved SPI connectors for reduced via density (DFM)
- added chip select for debug SPI

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4df00695

hardware: fix reversed FPGA leds, 1V1 regulator pi...

by Kate Temkin 5 years 6 months

hardware: fix reversed FPGA leds, 1V1 regulator pinout, silk typo

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eb8efde0

hw: address review comments, move to pre-r0.1

by Kate Temkin 5 years 7 months

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e9d30d63

rev0: routing: get our routing significnatly more ...

by Kate Temkin 5 years 9 months

rev0: routing: get our routing significnatly more complete :)

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f350fc04

rev0: clean up library references and backup files

by Kate Temkin 5 years 9 months

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93f94189

rev0: finish capture and start routing (woo!)

by Kate Temkin 5 years 9 months

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12a14700

schematic: finish initial capture

by Kate Temkin 5 years 9 months

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e8a6d0b1

schematic: capture initial target section

by Kate Temkin 5 years 9 months

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9257e85d

schematic: capture host section

by Kate Temkin 5 years 9 months

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d34ba5c6

schematic: complete initial configuration section

by Kate Temkin 5 years 9 months

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b6b435b9