kirill9617 / Luna - History

pre r0.2 -- minor improvements and debug fixes

by Kate Temkin 5 years 5 months

pre r0.2 -- minor improvements and debug fixes

- add silkscreen connector diagrams
- added test points for clock and voltage rails
- moved SPI connectors for reduced via density (DFM)
- added chip select for debug SPI

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4df00695

hw: address review comments, move to pre-r0.1

by Kate Temkin 5 years 7 months

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e9d30d63

rev0: get most of the major routing done

by Kate Temkin 5 years 8 months

rev0: get most of the major routing done

still needs power routing, length matching for the busses,
and routing for the misc control stuff

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d6e45fb8

rev0: clean up library references and backup files

by Kate Temkin 5 years 8 months

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93f94189

rev0: finish capture and start routing (woo!)

by Kate Temkin 5 years 8 months

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12a14700

schematic: finish initial capture

by Kate Temkin 5 years 8 months

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e8a6d0b1

schematic: capture initial target section

by Kate Temkin 5 years 8 months

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9257e85d

schematic: capture host section

by Kate Temkin 5 years 8 months

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d34ba5c6

schematic: complete initial configuration section

by Kate Temkin 5 years 8 months

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b6b435b9

schematic: capture additional... capture

by Kate Temkin 5 years 8 months

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0e4482a9