Dennis Field / dvk-mx8m-bsb - History

In preperation for the final order, re-export all the manufacturing files using the current date and rev number v1.0.0

Add the fab's stackup, panel array working files, and their CPW calculations

Use the new MDT320E03001 M.2 socket footprint in the layout, make the corresponding changes in the layout for this new footprint to work

This M.2 socket is used instead of the previous one due to the M.2 module having components on the back which are as tall as 1.35mm.

Move some of the reference designators on the silkscreen layers to more visible positions where possible, update the schematic, BoM, footprint, and layout to reflect the fact that the dual 2-input AND gate (U1803) is actually a 74AUP2G08* part (no longer *LVC*)

The rest of the silkscreen designators still need to be placed in more visible/unobstructed locations. The BoM still needs to have tolerance & rating values enter for all passive components that will be supplied by the PCBA house.

Make the ENET_* traces on the top layer 53mils in order to ensure they have a 50Ohm single-ended impedence, move one of the 5V_P bypass caps close to the SoM end of the USB2 diff pair, add meanders to the ENET_TXC, ENET_TX_CTL, ENET_RX_CTL in order to ensure these segments are matched to the long ENET_RXC segment (56.051mm, the rest of the RGMII signals are <10mm skew from this length and don't need adjusting, re-route the SIM card such that UIM-RESET is routed in between UIM-CLK and UIM-DATA as recommended by a BB manufacturer

Place and route the JTAG circuit, place and route the BOOT_MODE slide switch circuit, place and route the user-LED circuit, place and route the top-level sheet passive components (I2C2 pull-ups, 5V_SOM, 3V3_OUT, & ENET_2V5 bypass caps, PWR_EN pull-down, USB2_VBUS voltage divider for SoC's comparator, etc), route the microphone to the analog audio switch IC, update the schematic, BoM, and footprints to reflect the MHF4 coax cable change (including them being 5cm long)

Unrouted count is now 324. The power circuit and the display are what is now left to be placed on the board, a few nets currently on the board still need to be connected (~120). 3V3_SNVS and various other misc. power rails still need to be routed on the power plane (vias need to be placed near pads).

JTAG header footprint is accessible from the display side (not underneath the display). User-LED is in a location as-close-as-possible to the bottom center of the board (somewhat near the microphone).

Serpentine bends still need to be added to the CSI to match the intra-pair skew, still need to move the prox sensor to the top of the board!

Routed Wifi-SDIO and BT-RXD/TXD signals.
Placed glue logic of M.2 card.

Use MHF4 instead of U.FL connectors on the WiFi+BT antennae

Add WiFi+BT antenna footprint, add pi matching circuit to the WiFi+BT antennas' feedlines, increment the capacitor part numbers on page 18 after adding the new (NC) feedline caps and make the respective changes to the reference designators in the BoM

Change all 0603 capacitors _EXCEPT_ the 2.2uF, 4.7uF, 8.2uF, 10uF, and 22uF caps to 0402